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Doctoraal voorlichting 2002

Doctoraal voorlichting 2002. Computersystemen. Andy Pimentel. Computer Architectuur & Parallelle Systemen groep. Een globaal overzicht. Groepsleider: Prof. Dr L.O. Hertzberger

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Doctoraal voorlichting 2002

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  1. Doctoraal voorlichting 2002 Computersystemen Andy Pimentel Computer Architectuur & Parallelle Systemen groep

  2. Een globaal overzicht • Groepsleider: Prof. Dr L.O. Hertzberger • Het onderzoek concentreert zich op computer architectuur als integraal concept, wat inhoudt dat applicatie, compiler, OS en hardware in het geheel worden beschouwd • Op dit moment 5 onderzoeksthema’s • Computer architectuur modellering en simulatie • Grid computing • Federated databases • Traffic applications • Advanced Internet technology

  3. Architectuur modellering en simulatie • Verantwoordelijk docent: dr. A.D. Pimentel (andy@science.uva.nl) • Het ontwerp van methoden en technieken voor computer architectuur simulatie • Enkele trefwoorden voor dit onderzoek: • Modellerings methodology • Abstractie niveau(s) • Experimentatie • Validatie • Mixed-level simulatie • Nauwe samenwerking met: Philips Research, Universiteit Leiden en TU Delft Later meer...

  4. Grid Computing • Verantwoordelijk docent: dr. A. Belloum (adam@science.uva.nl) • Prestatie analyse tests op een Grid testbed, (grafische) user interfaces voor Grid gebruikers en de ontwikkeling van een collaboratief systeem voor grid-gebaseerde applicaties • Enkele trefwoorden voor dit onderzoek: • Grid technology • Human-computer interaction • Scheduling voor Grid systemen • Collaboratieve systemen • Samenwerking met: Nikhef, SARA, Amolf • URL: VLABWWW.nikhef.nl/VLAM-G/

  5. Federated databases • Verantwoordelijk docent: dr. H. Afsarmanesh (hamideh@science.uva.nl) • Ontwerp en ontwikkeling van software architecturen die “inter-operability” en integratie van cooperatieve informatie systemen ondersteunen • Enkele trefwoorden voor dit onderzoek: • Interoperable en cooperatieve informatie systemen • Informatie en service brokerage • Integratie van bestaande multi-databases • High-performance webserver / database integratie • Samenwerking met: o.a. AMC,Unilever, Nikhef • URL: www.science.uva.nl/~netpeer/

  6. Traffic applications • Verantwoordelijk docent: drs. A. Visser (arnoud@science.uva.nl) • Onderzoek naar onderwerpen gerelateerd aan mobiliteit: de operationele architectuur van de mobiele robot MARIE, modellering en analyse van sensor systemen langs wegen • Enkele trefwoorden voor dit onderzoek: • Toegepast onderzoek • Mobiliteit • Embodied computer systemen • URL: www.science.uva.nl/~arnoud/research/ + www.science.uva.nl/~arnoud/projects/

  7. Advanced Internet Technology • Verantwoordelijk docent: dr. C. de Laat (delaat@science.uva.nl) • Onderzoek naar het Next Generation Internet en grid-enabling technologie • Enkele trefwoorden voor dit onderzoek: • Optische netwerken voor Grid applicaties • Autenticatie, autorisatie en accounting (AAA) modellering • Intelligente netwerk devices • Optimalisatie, meten, monitoren, geavanceerde protocol stacks (voor high-bandwidth connecties over lange afstanden) • URL: www.science.uva.nl/~delaat/

  8. Een greep uit de beschikbare afstudeer projecten • Traffic simulation of vehicles with a shape • Reserveringsrijden: het beter benutten van de weg door het reserveren van ruimte • Stream data prefetching for (multimedia) processors • Validation of abstract architecture models of embedded media systems • Integrating the SimpleScalar simulator into Sesame • Predicting the impact of large public events on congestion • Optical networking for Grid applications

  9. Vakkenpakket • Verplicht • Advanced Computer Architecture (7 ptn, 10 ECTS) • voorheen Architectuur-compiler interactie • Embedded Systems (7 ptn, 10 ECTS) • Verplicht 7 ptn uit volgende vakken • Ontwerp en organisatie van autonome systemen (7 ptn, 10 ECTS) • Parallel wetenschappelijk rekenen en simulatie (7 ptn, 10 ECTS) • Databases en webgebaseerde toepassingen (7 ptn, 10 ECTS) • Aangeraden • O.a. Computernetwerken en gespreide systemen (beide VU)

  10. Perspectieven • IT industrie • b.v. KPN, ACE, Philips, CMG, OCE, Ericson, Getronics, etc. • Onderzoeksinstituten • zoals NLR en TNO • Banken • Freelance, eigen bedrijf • Onderwijs, Universiteiten, Overheid

  11. A bit more on research in my group (computer architecture modeling and simulation)

  12. Trends in embedded system design Complexity of system design is increasing • Observations • Modern embedded systems for media and signal processing must support multiple applications and various standards for which they often should provide real-time performance • These systems increasingly have heterogeneous system architectures, integrating • dedicated hardware • embedded processor cores • reconfigurable components (e.g. FPGAs) • Increasing silicon budgets • Integration of functions: Systems on Chip

  13. Specification Back-of-the-envelope calculations Abstract executable models 10000 lines Cycle-true simulation models Mins/ hours 10000+ lines Synthesizable RTL models Hours/ days “Jumping down” the design pyramid High Low Effort Abstraction Low High Alternative realizations

  14. Specification Explore Artemis Back-of-the-envelope calculations 1000 lines Abstract executable models Secs/ minutes 10000 lines Cycle-true simulation models Mins/ hours 10000+ lines Synthesizable RTL models Hours/ days Design by stepwise refinement High Low Effort Abstraction Low High Alternative realizations

  15. The Artemis architecture simulation environment • Performance evaluation of instantiations of embedded systems architectures • Including different • application-architecture mappings: which component does what? • HW/SW partitionings: which application task(s) is/are performed in SW and which one(s) in HW? • At multiple levels of abstraction • For a broad range of multi-media applications • We target the early design stages • Quick and flexible model construction • Easy re-use of models and model components (e.g., library approach) • Fast simulations (large design space)

  16. Applications Mapping Performance Analysis Performance Numbers Use separate models for application and architecture behavior Y-chart Based Methodology Architecture

  17. Traces of application events Modeling and simulation methodology • Application model • Description of functional behavior of application • Independent from architecture, HW/SW partitioning and timing characteristics • Generates application events representing the workload imposed on the architecture • Architecture model • Parameterized timing behaviour of architecture components • Models timing consequences of application events Application model Architecture model • Explicit mapping of application and architecture models • Trace-driven co-simulation • Easy reuse of both application and architecture models!

  18. Application modeling • Applying the Kahn process networks model of computation • Parallel processes communicating with each other via unbounded FIFO channels • expresses parallelism in an application and makes communication explicit • Generation of application events: • Code is instrumented with annotations describing computational actions • Reading from/writing to Kahn channels represent communication behavior • Application events can be very coarse grain • like “compute a matrix multiplication” or ”read/write a pixel block”

  19. Event queue Mapping the application model • Event queues are used for mapping the appl. event traces • Mapping two or more event queues to one architecture component is possible: events are scheduled Kahn process Channel Application model Proc. core Proc. core • Kahn channels are mapped to communication components at architecture level FIFO buffer Architecture model Bus

  20. Architecture modeling • Construct architecture models from generic building blocks (library approach) • Library contains performance models for common architecture components • processing cores, communication media (like buses), memories, etc. • Accounting for functional behavior not necessary! • Architecture modeling starts at “black-box”level • Processing cores can model timing behavior of SW, HW or reconfigurable execution • parameterizable latencies for the application events • SW execution: high latency, HW execution: low latency • Allows for rapidly evaluating different HW/SW partitionings!

  21. Tot slot... • Http://www.science.uva.nl/research/arch/ (groeps info) • Http://www.science.uva.nl/research/graduate/ (afstudeer info) • Http://www.science.uva.nl/~andy/ (computer arch. simulatie) • Http://ce.et.tudelft.nl/artemis/ (Artemis project homepage) • Email andy@science.uva.nl (of de desbetreffende docent) voor verdere informatie

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