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Computer Science 210 Computer Organization

Computer Science 210 Computer Organization. The Arithmetic Logic Unit. ALU - General. Goal is to design simple ALU Actually there are relatively few basic arithmetic logic operations needed Many instructions can be implemented in terms of the basic ones. AND Gate. Multiplexor. NOT Gate.

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Computer Science 210 Computer Organization

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  1. Computer Science 210Computer Organization The Arithmetic Logic Unit

  2. ALU - General • Goal is to design simple ALU • Actually there are relatively few basic arithmetic logic operations needed • Many instructions can be implemented in terms of the basic ones

  3. AND Gate Multiplexor NOT Gate ALU Building Blocks OR Gate

  4. operation a result b An ALU (arithmetic logic unit) • Let's build an ALU to support the andi and ori instructions • we'll just build a 1 bit ALU, and use 32 of them

  5. Review: The Multiplexer • Selects one of the inputs to be the output, based on a control input • We’ll use a MUX for our ALU S 01 A C B

  6. 1-Bit Logical Unit Operation Result 01 0 - AndOperation 1 - Or

  7. 1-Bit ALU with Addition O p e r a t i o n C a r r y I n a 0 1 R e s u l t 2 b C a r r y O u t

  8. 32 bit ALU

  9. What about subtraction (a – b) ? • Two's complement approach: just negate b and add one. • How do we negate?

  10. 32 bit ALU binvert binvert O p e r a t i o n C a r r y I n a 0 1 R e s u l t + 0 b 2 1 C a r r y O u t binvert = 1, carryin = 1, operation = 2, gives a + ~b + 1 = a - b

  11. Overflow Detection Note: This can be determined by what happens in the high order bit.

  12. Overflow Detection Note: If we used the output of the binvert MUX, the rows for subtraction would be the same as for addition.

  13. Overflow Detection Note: The other rows of a truth table for Overflow would be 0. So, we could build an overflow detector with _ _ _ AMR + AMR

  14. High Order 1-Bit ALU(with overflow hardware) B i n v e r t O p e r a t i o n C a r r y I n a 0 1 R e s u l t 0 b 2 1 Overflow C a r r y O u t

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