68hc11 parallel i o
Download
Skip this Video
Download Presentation
68HC11 Parallel I/O

Loading in 2 Seconds...

play fullscreen
1 / 87

68HC11 Parallel I - PowerPoint PPT Presentation


  • 321 Views
  • Uploaded on

68HC11 Parallel I/O. Chapter 7. Microcontroller-Based System. To I/O. CPU: Central Processor Unit I/O: Input/Output Memory: Program and Data Bus: Address signals, Control signals, and Data signals. Microcontroller e.g. M68HC11. Terminology.

loader
I am the owner, or an agent authorized to act on behalf of the owner, of the copyrighted work described.
capcha
Download Presentation

PowerPoint Slideshow about '68HC11 Parallel I' - charlee


An Image/Link below is provided (as is) to download presentation

Download Policy: Content on the Website is provided to you AS IS for your information and personal use and may not be sold / licensed / shared on other websites without getting consent from its author.While downloading, if for some reason you are not able to download a presentation, the publisher may have deleted the file from their server.


- - - - - - - - - - - - - - - - - - - - - - - - - - E N D - - - - - - - - - - - - - - - - - - - - - - - - - -
Presentation Transcript
microcontroller based system
Microcontroller-Based System

To I/O

CPU: Central Processor Unit

I/O: Input/Output

Memory: Program and Data

Bus: Address signals, Control signals, and Data signals

Microcontroller

e.g. M68HC11

terminology
Terminology
  • Pin – This is a physical point that connects the microcontroller to the outside world.
  • I/O – Input /Output
  • Input – This is an input pin
  • Output – This is an output pin
  • Bidirectional I/O – This is pin which can be configured as either input or output.
  • Port I/O register= This is a data registerthat is physically connected to a set of I/O pins
  • Control register = This a control register used to configure the operation of a data port or some other function on the controller.
terminology4
Terminology
  • Memory-mapped I/O: Microcontroller configuration in which external I/O is accessed using normal memory access instructions.
    • The M68HC11 uses memory mapped I/O.
      • This is in contrast to other microprocessors (e.g. Intel) which have a separate I/O address space and use special instructions to access it.
input buffer
Input Buffer

Din

Equation

Symbol

Input pin

Truth Table

output buffer
Output Buffer

Dout

Equation

Output pin

Symbol

Truth Table

another meaning of buffer
Another meaning of “buffer”
  • The word buffer is also frequently used in computer engineering to refer to a region of storage (registers or memory) that is used to hold data temporarily while it is being (or waiting to be) sent or received.
    • This usage is contrasted with an electrical buffer (previous slides) which just amplifies and delays a signal.
multiple outputs
Multiple Outputs

Y

lower

A

A

Y

Y

0

1

raise

Chip B

Chip A

Let A_A = 0

Let B_A = 1

What is Y?

Unknown

X

tri state driver
Tri-State Driver

Active-low signal “OEn”(Output Enable)

Equation

Symbol

Truth Table

High Impedance State

“Open Circuit”

one implementation
One implementation

Of a tristate buffer in CMOS…

Vdd

Output-drivinginverter

CMOSTransmissionGate

A

A

Y

OEn

GND

multiple outputs13
Multiple Outputs

Y Bus

Driver

Floating

0

1

raise

Chip A

Chip B

Let A_A=1

Let B_A=0

Y=1

1

0

controller

multiple outputs14
Multiple Outputs

Y Bus

Driver

Floating

0

1

Chip B

Chip A

Let A_A=0

Let B_A=1

Y=0

0

1

controller

field effect transistors fets
Field Effect Transistors - FETS

A

FET acts like a “switch”

If Vgate is ONE, switch is closed, connecting A and B otherwise A and B are isolated.

B

Field Effect Transistor (FET)

open drain output driver
Open Drain Output Driver

We can use an FET as an Output Driver

When Din=1, Dout=0

When Din=0, Dout=Z

“open circuit”

How does Dout become an ONE?

open drain output driver18
Open Drain Output Driver

Use an external pull-up resistor

When Din=1, Dout=0

FET is ON, Dout=0

When Din=0, Dout=1

FET is OFF, Dout is pulled up to VDD

Why do this?

simple data i o control
Simple Data I/O Control

Controller sends data to Chip-A and Chip-B

Halt

B

A

Data

However, either device can “Halt” the transfer by bringing the halt line low.

“Wired-OR” configuration

bi directional i o driver
Bi-directional I/O Driver
  • Allows a single pin to be configured as an input buffer or an output buffer.
bi directional i o buffer
Bi-Directional I/O Buffer

Symbol

Tri-state Buffer

Function Table

From

Ckt

dio Pin

ToCkt

Input

Buffer

Note: I/O buffer is either

Input or output

bi directional i o buffer as input buffer
Bi-Directional I/O Bufferas Input Buffer

Symbol

1

Floating

Dio

(Input)

To_ckt

Input

Buffer

To_ckt = Dio

bi directional i o buffer as output buffer
Bi-Directional I/O Bufferas Output Buffer

Symbol

0

Active

Dio is From_ckt

From_ckt

Dio

(Output)

To_ckt

Note: To_ckt is also From_ckt

Input

Buffer

m68hc11 port summary
M68HC11 Port Summary
  • PortA
    • 1 bidirectional, 3 input, and 4 output port
    • Timer port
  • PortB
    • 8-bit fixed output port
      • Used for high byte of mem. addr. in expanded mode
  • PortC
    • 8-bit bidirectional parallel port
      • Used for low byte of address & for data in expanded mode
  • PortD
    • 6-bit bidirectional parallel or serial I/O port
  • PortE
    • 8-bit digital or analog input port

One of the 4 outputs isbidirectional on the E9

m68hc11e block diagram
M68HC11E block diagram

From datasheet, p.17

tangent on operating modes
Tangent on Operating Modes
  • The HC11 has four operating modes.
  • These are selected by input signals on the MODB and MODA inputs when the chip is reset.

(from HC11 Reference Manual, p.47)

default memory maps of hc11e9
Default Memory Maps of HC11E9

(From the HC11E series datasheet, p.37)

ports b and c are mode dependent
Ports B and C are mode-dependent

Reference manual, p. 62

example pin connections in single chip hc11 systems
Example pin connections in single-chip HC11 systems
  • Very simple configuration.
  • A small amount of external circuitry is still needed, for:
    • Power supply conditioning
    • External clocking
    • Low-voltage reset
    • Setting mode bits
  • Note there is no external ROM/RAM in this mode!
    • But B and C ports are available for doing parallel I/O.

(Reference manual, p.117)

connecting external memory
Connecting External memory

Reference

Manual,

pp. 117-118

PC

PB

connecting external memory34
Connecting External Memory
  • Note in this example, the 8K EPROM Chip is Selected (CS) if A13 & A15 are high.
  • And, A0-A12 are fed to the EPROM.
  • Therefore, what range(s) of addresses does the EPROM chip map to?

Reference

Manual,

p. 118

port a address 1000
Port A – Address $1000
  • An 8-bit, parallel I/O port.
  • Data address $1000 (normally)
  • Multi-Function
    • I/O Port
    • Timer Port
  • PACTL – Port A Control Register ($1026)
    • determines port function
port a i o pin modes
Port A – I/O Pin Modes
  • Bits 0-2: Input Bits
    • PA0-PA2
  • Bits 3-6: Output Bits
    • PA3-PA6
  • Bit 7 Bidirectional Bit
    • Direction set in PACTL

Except that PA3 isbidirectional in the E9

port a 1000 data

7

6

5

4

3

2

1

0

Port A - $1000 Data

B

O

O

O

O

I

I

I

Bits

Notation:

PA7 = Bit 7 of Port A

PA6 = Bit 6 of Port A

PA5 = Bit 5 of Port A

……………………………….

PA0 = Bit 0 of Port A

O=Output

I =Input

B=Bidirectional

port a circuit schematic
Port A Circuit Schematic

This one is also bidirectional in the HC11E’s

port a i o port mode
Port A – I/O Port Mode
  • Example:

* Bit 7 configured as input (default)

PortA EQU $1000

* Output a $C to Port A

Outdata EQU %01101000 ;Sets bits 3,5,6

…………

* Output data to PortA

LDAA #Outdata

STAA PortA

* Read Data from PortA

LDAA PortA

pactl 1026 port a control register

DDRA7

PAEN

PAMOD

PEDGE

0

0

RTR1

RTR0

7

6

5

4

3

2

1

0

Bits

PACTL: $1026Port A Control Register

This is DDRA3 in the E series

  • DDRA7 = Data Direction Register A7
  • 0 = Input Direction (Default)
  • 1 = Output Direction
  • PAEN = Pulse Accumulator System Enable
  • 0 = Disable (Default)
      • Port A is set for I/O function
      • 1 = Enable
      • Port A is set for Pulse Accumulator function
      • (part of timer system, to be discussed later)
led circuit example
LED Circuit Example

Switch

Light On

Light Off

68hc11 led example
68HC11 LED Example
  • We’ll use PA7 for Input, PA6 for output
    • PA7=0 switch open, PA7=1 switch closed
    • PA6=0 LED off, PA6=1 LED on
  • Pseudo-code:
    • Configure PortA ;
    • Repeat
      • IF(PA7=0) then ; Switch is open
        • PA6=0 ; Turn LED OFF
      • Else
        • PA6=1 ; Turn LED ON
      • EndIF
    • Until Forever
program using brset bset bclr
Program, using BRSET/BSET/BCLR
  • These instructions allow us to manipulate individual bits, but they force us to use indexed addressing to refer to the I/O registers
    • Extended direct mode is not available with these particular instructions

BIT6 EQU %01000000 ; Mask for bit 6

BIT7 EQU %10000000 ; Mask for bit 7

IOBASE EQU $1000 ; Base of I/O config registers

PORTA EQU $00 ; Offset of PORTA ($1000)

PACTL EQU $26 ; Offset of PACTL ($1026)

start: LDX #IOBASE ; Point X at I/O config registers

CLR PACTL,X ; Clear all PACTL control flags.

loop: BRSET PORTA,X BIT7 on ; If port A bit 7 is set, turn LED on

BCLR PORTA,X BIT6 ; else, turn LED off. (Clear bit 6)

BRA endif ; Go to end of if statement.

on: BSET PORTA,X BIT6 ; Turn LED on (set bit 6).

endif: JMP loop ; Repeat.

port b
Port B
  • 8-bit port
    • Fixed Direction: Output
  • Data address: $1004
    • Writing to Address $1004 will write to the port.
  • Example:

PortB EQU $1004

Value EQU $F2

...

LDAA #Value

STAA PortB

  • When the HC11 is in expanded mode, on boards with no Port Replacement Unit,
    • Port B is reserved for the upper 8 address bits (AD9-AD15)
port b 1004 data

7

6

5

4

3

2

1

0

Port B - $1004 Data

O

O

O

O

O

O

O

O

Bits

O=Output

port c
Port C
  • 8-bit bidirectional port
  • Data address: $1003
  • Multi-Function:
    • In single-chip mode, or with a Port Replacement Unit
      • I/O Port
      • Latched data from Port C is available at address $1005
        • It’s latched when a rising edge occurs on STRA pin
      • Handshaking port
    • In expanded mode with no Port Replacement Unit,
      • Used for low 8 bits (AD0-AD7) of memory address bus and for memory data bus (D0-D7)
  • PIOC – Parallel I/O Control Register C determines function
port c 1003 data

7

6

5

4

3

2

1

0

Port C - $1003 Data

B

B

B

B

B

B

B

B

Bits

O=Output

I =Input

B=Bidirectional

ddrc 1007

7

6

5

4

3

2

1

0

DDRC - $1007

DDCn= Data Direction Bit n

DDC7

DDC6

DDC5

DDC4

DDC3

DDC2

DDC1

DDC0

Bits

DDCn:

0 = Input (Default)

1 = Output

portcl 1005 latched data

7

6

5

4

3

2

1

0

PORTCL - $1005 Latched Data

B

B

B

B

B

B

B

B

Bits

O=Output

I =Input

B=Bidirectional

pioc 1002 staf bit parallel i o control register

7

6

5

4

3

2

1

0

PIOC - $1002 (STAF Bit)Parallel I/O Control Register

EGA

INVB

STAF

STAI

CWOM

HNDS

OIN

PLS

Bits

STAF = Strobe A Flag

0 = Inactive (default)

1 = Set at the active edge of STRA pin

Read only bit. Used to determine when data have been latched into Port C. Cleared after bit has been set and read.

pioc 1002 stai bit parallel i o control register

7

6

5

4

3

2

1

0

PIOC - $1002 (STAI Bit)Parallel I/O Control Register

EGA

INVB

STAF

STAI

CWOM

HNDS

OIN

PLS

Bits

STAI = Strobe A Interrupt Enable

0 = No hardware interrupt generated (default)

1 = Interrupt requested when STAF=1

Enables or disables the interrupt request from being generated when STRA is asserted.

pioc 1002 parallel i o control register cwom and ega bit

7

6

5

4

3

2

1

0

PIOC - $1002 Parallel I/O Control Register(CWOM and EGA Bit)

EGA

INVB

STAF

STAI

CWOM

HNDS

OIN

PLS

Bits

CWOM = Port C Wire-OR Mode

0 = Normal Outputs (default)

1 = Open Drain Outputs

EGA = Active Edge Select for STRA

0 = Falling edge (High to Low)

1 = Rising edge (Low to High)

port d
Port D
  • 6-bit
  • Address $1008
  • Multi-Function
    • Bidirectional Port
    • Serial I/O Port
      • Serial Communications Interface (SCI)
        • Asynchronous (i.e. no clock signal needed)
      • Serial Peripheral Interface (SPI)
        • Synchronous (i.e. a clock signal needed)
port d 1008 data register

7

6

5

4

3

2

1

0

Port D - $1008 Data Register

X

X

B

B

B

B

B

B

Bits

X=Not Used

B=Bidirectional

ddrd 1009

7

6

5

4

3

2

1

0

DDRD - $1009

DDDn= Data Direction Bit n

X

X

DDD5

DDD4

DDD3

DDD2

DDD1

DDD0

Bits

DDDn:

0 = Input (Default)

1 = Output

spcr 1028 spi control register

7

6

5

4

3

2

1

0

SPCR - $1028 SPI Control Register

SPR1

SPR0

SPIE

SPE

DWOM

MSTR

CPOL

CPOH

Bits

SPIE = SPI System Enable

0 = Disable (default)

1 = Enable

This bit should be 0 to use Port D for parallel I/O

DWOM = Port D Wire-OR Mode

0 = Normal Outputs (default)

1 = Open Drain Outputs

sccr2 102d sci control register 2

7

6

5

4

3

2

1

0

SCCR2 - $102DSCI Control Register 2

RWU

SBK

TIE

TCIE

RIE

ILIE

TE

RE

Bits

TE = Transmit Enable

0 = Disable (default)

1 = Enable

This bit should be 0 to used Port D for parallel I/O

RE = Receiver Enable

0 = Disable (default)

1 = Enable

This bit should be 0 to used Port D for parallel I/O

port e
Port E
  • 8-bit
  • Address $100A
  • Multi-Function
    • Digital Input Port
    • Analog Input Port (Built-in A/D)
port e 100a data register

7

6

5

4

3

2

1

0

Port E - $100A Data Register

I

I

I

I

I

I

I

I

Bits

O=Output

I =Input

B=Bidirectional

handshaking i o

Handshaking I/O

Section 7.5

problem
Problem
  • Need to transfer data to and from Source to 6811
several approaches
Several Approaches
  • Simple Strobed I/O
  • Full Handshaking I/O
  • Let’s look at several examples
simple strobed i o
Simple Strobed I/O
  • Data Bus
  • Single Control line between Source and 6811

Data Bus

Control

Bus

simple strobed input
Simple Strobed Input

Data source places data on bus, uses strobe to indicate

“the data is now valid”

simple strobed input66
Simple Strobed Input
  • Timing Diagram

This edge indicates that the “data are now valid”

Use this edge to “latch” the data into the 6811

simple strobed output
Simple Strobed Output

6811 uses strobe to indicate to the receiver that

Data are available

simple strobed output68
Simple Strobed Output
  • Timing Diagram

This edge indicates that the data are “ready”

simple strobed i o69
Simple Strobed I/O
  • Advantage -
    • Simple
  • Disadvantage
    • Must know timing relationship between data source/rcvr and 6811.
      • Input: How fast can 6811 accept new data.
      • Output: How fast can receiver accept data from 6811
simple strobed i o using the 681171
Simple Strobed I/O: Using the 6811
  • PORTC is used for strobed input
    • Read data from PORTCL ($1005)
    • External pin: STRA is used to latch data
  • PORTB is used for strobed output
    • External pin: STRB is used as output ready
simple strobed i o using the 681172
Simple Strobed I/O: Using the 6811
  • SET HNDS bit (bit 4) in PIOC control register ($1002) to 0
  • SET EGA bit (bit 1) in PIOC control register ($1002) to desired active edge
    • 0 = High to Low (falling)
    • 1 = Low to High (rising)
  • SET INVB to set active edge of output strobe
    • 0 = active low (High to low)
    • 1 = active high (low to high) (default)
reading input
Reading Input
  • STAF bit in PIOC is set when new data are written into latch.
  • Reading STAF bit will reset it to zero
  • Let’s look at an example
reading input75
Reading Input
  • Configure PortC for input
    • Write $00 to DDRC ($1007)
  • Configure PortC via PIOC ($1002) for
    • No interrupts (STAI=0)
    • Active High Inputs (EGA=1)
    • Active High Outputs (INVB=1)
    • Simple Handshaking (HNDS=0)
    • Config bits = %00000011
reading input76
Reading Input
  • Repeat
  • Read STAF
  • Until STAF=1
  • Read PORTCL ($1005) ; This clears STAF
writing output
Writing Output
  • Writing to Port B will automatically assert the STRB pin for two clock periods.
  • Use INVB to control the polarity on STRB
    • 0 = Active low
    • 1 = Active high
full handshaking i o protocol
Full Handshaking I/O Protocol
  • Data Bus
  • Two Control Lines

Data Bus

Control

Bus

full handshaking i o81
Full Handshaking I/O
  • Disadvantages
    • More complicated I/O
  • Advantages
    • Control timing relationship between 6811 and External Device
input handshaking
Input Handshaking
  • Input Handshaking
  • Ext. Device places data on bus
  • Device asserts “strobe” to indicate “data is available.”
  • Ext. Device asserts “strobe” to indicate
  • “acknowledgement” or “I have the data.”
input handshaking83
Input Handshaking

Data

STRA

STRF

Internal

Flag

STRB

This edge indicates to the 6811 that “data are available.”

This edge indicates to the External Device that “I have the data.”

Ext. Device can send the next byte

reading input full handshaking
Reading Input Full Handshaking
  • Configure PortC for input
    • Write $00 to DDRC ($1007)
  • Configure PortC via PIOC ($1002) for
    • No interrupts (STAI=0)
    • Active High Inputs (EGA=1)
    • Active High Outputs (INVB=1)
    • Full Handshaking (HNDS=1)
    • Input Handshaking (OIN=0)
    • STRB Level mode select (PLS=0)
    • Config bits = %00010011
  • Read input as in Simple Input example
output handshaking
Output Handshaking
  • 6811 asserts STRB that says “data are available.”
  • Ext. Device reads data.
  • Ext. Device asserts “strobe” to indicate that
  • I have the “data.” Ready for another byte.
output handshaking86
Output Handshaking

Data

STRB

STRA

STRF

This edge indicates to the External Device that “data are available.”

This edge indicates to the 6811 that “I have the data.” 6811 can

Send another data byte

writing full handshaking
Writing Full Handshaking
  • Configure PortC for output
    • Write $FF to DDRC ($1007)
  • Configure PortC via PIOC ($1002) for
    • No interrupts (STAI=0)
    • Active High Inputs (EGA=1)
    • Active High Outputs (INVB=1)
    • Full Handshaking (HNDS=1)
    • Output Handshaking (OIN=1)
    • STRB Level mode select (PLS=0)
    • Config bits = %00011011
  • Read input as in Simple Input example
ad