Chapter 3 memory management part 2
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CHAPTER 3 MEMORY MANAGEMENT PART 2. by Uğur Halıcı. 3.3 Paging. In paging, the OS divide the physical memory into frames which are blocks of small and fixed size. 3.3 Paging. In paging, the OS divide the physical memory into frames which are blocks of small and fixed size. 3.3 Paging.

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CHAPTER 3 MEMORY MANAGEMENT PART 2

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Chapter 3 memory management part 2

CHAPTER 3MEMORY MANAGEMENTPART 2

by Uğur Halıcı


3 3 paging

3.3 Paging

In paging, the OS divide the physical memory into frames which are blocks of small and fixed size


3 3 paging1

3.3 Paging

In paging, the OS divide the physical memory into frames which are blocks of small and fixed size


3 3 paging2

3.3 Paging

OS divides also the logical memory (program) into pages which are blocks of size equal to frame size.


3 3 paging3

3.3 Paging

OS divides also the logical memory (program) into pages which are blocks of size equal to frame size.


3 3 paging4

3.3 Paging

The OS uses a page table to map program pages to memory frames.


3 3 paging5

3.3 Paging

The OS uses a page table to map program pages to memory frames.


3 3 paging6

3.3 Paging

The OS uses a page table to map program pages to memory frames.


3 3 paging7

3.3 Paging

The OS uses a page table to map program pages to memory frames.


3 3 paging8

3.3 Paging

The OS uses a page table to map program pages to memory frames.


3 3 paging9

3.3 Paging

Paging permits a program to allocate noncontiguous blocks of memory


3 3 paging10

3.3 Paging

  • Page size (S) is defined by the hardware.

    • Generally page size is chosen as a power of 2 such as 512 words/page or 4096 words/page etc.

  • With this arrangement, the words in the program have an address called as logical address. Every logical address is formed of <p,d> pair


3 3 paging11

3.3 Paging

  • Logical address: <p,d>

    • p is page number

      p = logical address div S

    • d is displacement (offset)

      d = logical address mod S


3 3 paging12

3.3 Paging

  •  When a logical address <p, d> is generated by the processor, first the frame number f corresponding to page p is determined by using the page table and then the physical address is calculated as (f*S+d) and the memory is accessed.


3 3 paging13

3.3 Paging


3 3 paging14

3.3 Paging

Example 3.2

  • Consider the following information to form a physical memory map.

  • Page Size = 8 words  d : 3 bits

  • Physical Memory Size = 128 words

    = 128/8=16 frames  f : 4 bits

  • Assume maximum program size is 4 pages  p : 2 bits

  • A program of 3 pages where P0  f3; P1  f6; P2  f4


3 3 paging15

3.3 Paging


3 3 paging16

3.3 Paging


3 3 paging17

3.3 Paging


3 3 paging18

3.3 Paging


3 3 paging19

3.3 Paging


3 3 paging20

3.3 Paging


3 3 paging21

3.3 Paging

  • Every access to memory should go through the page table. Therefore, it must be implemented in an efficient way.

  • How to Implement The Page Table?

    • Using fast dedicated registers

    • Keep the page table in main memory

    • Use content-addressable associative registers


Using fast dedicated registers

Using fast dedicated registers

  • Keep page table in fast dedicated registers. Only the OS is able to modify these registers.

  • However, if the page table is large, this method becomes very expensive since requires too many registers.


Using fast dedicated registers1

Using fast dedicated registers

PTLR: Page Table Length Register

logical address

p

d

physical address

access PT in registers

P<PTLR

YES

access memory

f

d

NO

rat

mat

ERROR

Effective Memory Access Time

emat=rat+mat


Keep the page table in main memory

Keep the page table in main memory

  • In this second method, the OS keeps a page table in the memory, instead of registers.

  • For every logical memory reference, two memory accesses are required:

    • To access the page table in the memory, in order to find the corresponding frame number.

    • To access the memory word in that frame

  • This is cheap but a time consuming method.


  • Keep the page table in main memory1

    Keep the page table in main memory

    PTBR: Page Table Base Register

    PTLR: Page Table Length Register

    logical address

    p

    d

    Access PT entry

    in Memory at address

    PTBR + p

    physical address

    P<PTLR

    YES

    access memory

    f

    d

    NO

    mat

    mat

    ERROR

    Effective Memory Access Time:

    emat=mat+mat=2mat


    Use content addressable associative registers

    Use content-addressable associative registers

    • This is a mixing of first two methods.

    • Associative registers are small, high speed registers built in a special way so that they permit an associative search over their contents.

    • That is, all registers may be searched in one machine cycle simultaneously.

    • However, associative registers are quite expensive. So, a small number of them should be used.

    • In the overall, the method is not-expensive and not-slow.


    Use content addressable associative registers1

    Use content-addressable associative registers

    physical address

    logical address

    Found?

    p

    d

    Access PT entry

    in Memory at address

    PTBR + p

    Yes (HIT)

    physical address

    No (MISS)

    P<PTLR

    Yes

    access memory

    search PT in AR

    f

    d

    f

    d

    rat

    No

    mat

    mat

    ERROR

    Effective Memory Access Time: h: hit ratio

    Emat=h *ematHIT + (1-h) * ematMISS =h(rat+mat)+(1-h)(rat+mat+mat)


    Use content addressable associative registers2

    Use content-addressable associative registers

    • Assume we have a paging system which uses associative registers. These associative registers have an access time of 30 ns, and the memory access time is 470 ns. The system has a hit ratio of 90 %.

    • rat=30 ns

    • mat=470ns

    • h=0.9


    Use content addressable associative registers3

    Use content-addressable associative registers

    rat=30 ns, mat=470ns, h=0.9

    • Now, if the page number is found in one of the associative registers, then the effective access time:

    • ematHIT = 30 + 470 = 500 ns.

    • Because one access to associative registers and one access to the main memory is sufficient.


    Use content addressable associative registers4

    Use content-addressable associative registers

    rat=30 ns, mat=470ns, h=0.9

    • On the other hand, if the page number is not found in associative registers, then the effective access time:

    • ematMISS = 30 + (470+470) = 970 ns.

    • Since one access to associative registers and two accesses to the main memory are required.


    Use content addressable associative registers5

    Use content-addressable associative registers

    rat=30 ns, mat=470ns, h=0.9

    ematHIT = 500 ns, ematMISS = 970 ns.

    • Then, the emat is calculated as follows:

      emat= h *ematHIT + (1-h) * ematMISS

      = 0.9 * 500 + 0.1 * 970

      = 450 + 97 = 547 ns


    Sharing pages

    Sharing Pages

    • Sharing pages is possible in a paging system, and is an important advantage of paging.

    • It is possible to share system procedures or programs, user procedures or programs, and possibly data area.

    • Sharing pages is especially advantageous in time-sharing systems.


    Sharing pages1

    Sharing Pages

    • A reentrant program (non-self-modifying code = read only) never changes during execution.

    • So, more than one process can execute the same code at the same time.

    • Each process will have its own data storage and its own copy of registers to hold the data for its own execution of the shared program.


    Sharing pages2

    Sharing Pages

    • Example 3.4

    • Consider a system having page size=30 MB.

    • There are 3 users executing an editor program which is 90 MB (3 pages) in size, with a 30 MB (1 page) data space.

    • To support these 3 users, the OS must allocate 3 * (90+30) = 360 MB space.

    • However, if the editor program is reentrant (non-self-modifying code = read only), then it can be shared among the users, and only one copy of the editor program is sufficient. Therefore, only 90 + 30 * 3 = 180 MB of memory space is enough for this case


    Chapter 3 memory management part 2

    User 2 terminates:

    Data2 page is removed from memory, but editör pages remain..


    Chapter 3 memory management part 2

    User 1 terminates:

    data1 is also removed from memory.


    Chapter 3 memory management part 2

    When User 3 terminates:

    Data-3 and also editor segments are removed from memory.


    3 4 segmentation

    3.4 Segmentation

    • In segmentation, programs are divided into variable size segments, instead of fixed size pages.

    • This is similar to variable partitioning, but programs are divided to small parts.

    • Every logical address is formed of a segment name and an offset within that segment.

    • In practice, segments are numbered.

    • Programs are segmented automatically by the compiler or assembler.


    3 4 segmentation1

    3.4 Segmentation

    OS

    main

    • For example, a C compiler may create segments for:

      • the code of each function

      • the local variables for each function

      • the global variables.

    Func 1

    Func 2

    main

    Data 1

    Func 1

    Func 2

    Data 2

    Data 1

    Data 2

    Data 3

    Data 3

    Logical memory

    Physical memory


    3 4 segmentation2

    3.4 Segmentation

    • For logical to physical address mapping, a segment table is used. When a logical address <s, d> is generated by the processor:

      • Base and limit values corresponding to segment s are determined using the segment table

      • The OS checks whether d is in the limit. (0  d < limit)

      • If so, then the physical address is calculated as (base + d), and the memory is accessed.


    3 4 segmentation3

    3.4 Segmentation

    OS

    ERROR

    Logical address

    No

    0≤d

    <limit

    s

    d

    base

    Segment Table

    segment s

    d

    Yes

    acess

    the word at

    physical address

    =base + d

    seg. #

    limit

    base

    attr

    Physical memory


    3 4 segmentation4

    3.4 Segmentation

    • Example 3.5

      Generate the memory map according to the given segment table. Assume the generated logical address is <1,1123>; find the corresponding physical address.


    3 4 segmentation5

    0

    3.4 Segmentation

    OS

    1000

    s0

    1500

    2500

    3500

    s3

    2000

    5500

    s1

    200

    5700

    6000

    s2

    700

    6700

    Physical memory


    3 4 segmentation6

    0

    3.4 Segmentation

    OS

    1000

    s0

    1500

    2500

    3500

    s3

    2000

    5500

    s1

    200

    Logical address: <3,1123>

    s=3, d=1123

    Check if d<limit? 1123<2000, OK

    Physical address= base+d=3500+1123=4623

    5700

    6000

    s2

    700

    6700

    Physical memory


    3 4 segmentation7

    0

    3.4 Segmentation

    OS

    1000

    s0

    1500

    Base=

    3500

    2500

    3500

    s3

    2000

    5500

    s1

    200

    Logical address: <3,1123>

    s=3, d=1123

    Check if d<limit? 1123<2000, OK

    Physical address= base+d=3500+1123=4623

    5700

    6000

    s2

    700

    6700

    Physical memory


    3 4 segmentation8

    0

    3.4 Segmentation

    OS

    1000

    s0

    1500

    Base=

    3500

    2500

    3500

    s3

    d=

    1123

    2000

    4623

    5500

    s1

    200

    Logical address: <3,1123>

    s=3, d=1123

    Check if d<limit? 1123<2000, OK

    Physical address= base+d=3500+1123=4623

    5700

    6000

    s2

    700

    6700

    Physical memory


    3 4 segmentation9

    3.4 Segmentation

    • Segment tables may be implemented in the main memory or in associative registers, in the same way it is done for page tables.

    • Also sharing of segments is applicable as in paging. Shared segments should be read only and should be assigned the same segment number.


    Sharing segments

    0

    Sharing Segments

    OS

    1000

    user1

    Editör

    1500

    Editör

    s0

    2500

    Data-1

    s1

    3500

    Data-1

    2000

    5500

    Physical memory


    Sharing segments1

    0

    Sharing Segments

    OS

    1000

    user2

    user1

    Editör

    1500

    Editör

    Editör

    s0

    s0

    2500

    Data-2

    Data-1

    s1

    s1

    3500

    Data-1

    2000

    5500

    Data-2

    200

    5700

    Physical memory


    Sharing segments2

    0

    Sharing Segments

    OS

    1000

    user1

    user2

    user3

    Editör

    1500

    Editör

    Editör

    Editör

    s0

    s0

    s0

    2500

    Data-1

    Data-3

    Data-2

    s1

    s1

    s1

    3500

    Data-1

    2000

    5500

    Data-2

    200

    5700

    6000

    Data-3

    700

    6700

    Physical memory


    Sharing segments3

    0

    Sharing Segments

    OS

    1000

    user3

    user1

    Editör

    1500

    Editör

    Editör

    s0

    s0

    2500

    Data-3

    Data-1

    s1

    s1

    3500

    User 2 terminates:

    Data-2 removed from memory, but editör remains..

    Data-1

    2000

    5500

    6000

    Dat-3

    700

    6700

    Physical memory


    Sharing segments4

    0

    Sharing Segments

    OS

    User 1 terminates:

    Data-1segment is removed from memory.

    1000

    user3

    Editör

    1500

    Editör

    s0

    2500

    Data-3

    s1

    6000

    Data-3

    700

    6700

    Physical memory


    Sharing segments5

    0

    Sharing Segments

    OS

    When User 3 terminates:

    Data-1 and also editor segments are removed from memory.

    When User 3 terminates:

    Data-3 segment and also editor segment are removed from memory.

    Physical memory


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