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Chapter 4 Internal Memory

Chapter 4 Internal Memory. Contents. Computer Memory System Overview Semiconductor Main Memory Cache Memory Pentium. Key Characteristics of Computer Memory System. Computer memory system over view. Characteristics of Memory System. Computer memory system over view. Location

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Chapter 4 Internal Memory

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  1. Chapter 4 Internal Memory

  2. Contents • Computer Memory System Overview • Semiconductor Main Memory • Cache Memory • Pentium

  3. Key Characteristics of Computer Memory System Computer memory system over view

  4. Characteristics of Memory System Computer memory system over view • Location • Processor • Internal(main) • External(secondary)

  5. Capacity Computer memory system over view • Internal memory capacity • Expressed byte or word • External memory capacity • Expressed byte

  6. Unit of Transfer Computer memory system over view • Internal memory • The unit of transfer equal to number of data into and out of memory module • Often equal to word length of may not be • Word • natural unit of organization of memory • Size of the word equal to number of bits used to represent a number and to instruction length • Addressable unit • Addressable unit is word • Some system addressing byte level • Unit of transfer • Number of bits read out of or written into memory at a time

  7. Methods of Accessing Computer memory system over view • Sequential access • Start at the beginning and read through in order • Access time depends on location of data and previous location • e.g. tape • Direct access • Individual blocks have unique address • Access is by jumping to vicinity plus sequential search • Access time depends on location and previous location • e.g. disk

  8. Methods of Accessing Computer memory system over view • Random access • Individual addresses identify locations exactly • Access time is independent of location or previous access • e.g. RAM • Associative access • Data is located by a comparison with contents of a portion of the store • Access time is independent of location or previous access • e.g. cache

  9. Performance Computer memory system over view • Access time • Time it takes to perform read or writ operation (for random-access memory) • Time it takes to position the read-write mechanism at desired location (for non-random-access memory) • Memory cycle time • Applied to random-access memory • Consist of access time plus any additional time required before next access

  10. Performance Computer memory system over view • Transfer rate • Rate which data transferred into or out of memory unit (for random-access memory) • For non-random-access memory TN = Average time to read or write N bits TA = Average access time N = Number of bits R = Transfer rate, in bits per second(bps)

  11. Physical Types Computer memory system over view • Semiconductor • RAM • Magnetic • Disk & Tape • Optical • CD & DVD • Others • Bubble • Hologram

  12. Physical Characteristics Computer memory system over view • Decay • Volatility • Erasable • Power consumption

  13. Organization Computer memory system over view • Physical arrangement of bits into words • Not always obvious • e.g. interleaved

  14. The Bottom Line Computer memory system over view • How much? • Capacity • How fast? • Time is money • How expensive?

  15. The Memory Hierarchy Computer memory system over view • Relationships • Faster access time, greater cost per bit • Greater capacity, smaller cost per bit • Greater capacity, slower access time • As one goes down the hierarchy, the following occur • Decreasing cost per bit • Increasing capacity • Increasing access time • Decreasing frequency of access of the memory by the processor

  16. The Memory hierarchy Computer memory system over view

  17. The Memory Hierarchy Computer memory system over view • Registers • In CPU • Internal or Main memory • May include one or more levels of cache • “RAM” • External memory • Backing store

  18. Performance of A Two-Level Memory Computer memory system over view

  19. Hierarchy List Computer memory system over view • Registers • L1 Cache • L2 Cache • Main memory • Disk cache • Disk • Optical • Tape

  20. The Memory Hierarchy Computer memory system over view • Locality of reference • During the course of the execution of a program, memory references tend to cluster

  21. The Memory Hierarchy Computer memory system over view • Additional levels can effectively added to the hierarchy in software • Portion of main memory can be used as a buffer to hold data that to be read out to disk • Such a technique, sometimes referred to as a disk cache

  22. So You Want Fast? Computer memory system over view • It is possible to build a computer which uses only static RAM (see later) • This would be very fast • This would need no cache • How can you cache cache? • This would cost a very large amount

  23. Semiconductor Memory Types Semiconductor main memory

  24. RAM Semiconductor main memory • Misnamed as all semiconductor memory is random access • Read/Write • Volatile • Temporary storage • Static or dynamic • Require periodic charge refreshing to maintain data storage

  25. DRAM Semiconductor main memory • Bits stored as charge in capacitors • Charges leak • Need refreshing even when powered • Simpler construction • Smaller per bit • Less expensive • Need refresh circuits • Slower • Main memory

  26. SRAM Semiconductor main memory • Bits stored as on/off switches • No charges to leak • No refreshing needed when powered • More complex construction • Larger per bit • More expensive • Does not need refresh circuits • Faster • Cache

  27. Read Only Memory (ROM) Semiconductor main memory • Permanent storage • Applications • Microprogramming • Library subroutines • Systems programs (BIOS) • Function tables • Problems • Data insertion step includes large fixed cost • No room for error • Written during manufacture • Very expensive for small runs

  28. Programmable ROM (PROM) Semiconductor main memory • Nonvolatile & Written only once • Writing performed electrically and may performed by supplier or customer after original chip fabrication • Needs special equipment to program

  29. Read “Mostly” Memory (RMM) Semiconductor main memory • Erasable Programmable ROM (EPROM) • Storage cell must erased by UV before written operation • Read and written electrically • More expensive PROM • Advantage of multiple update capability

  30. Electrically Erasable PROM(EEPROM) Semiconductor main memory • Takes much longer to write than read • Advantage • Nonvolatility & being updatable in using ordinary bus control, address, data line

  31. Flash Memory Semiconductor main memory • Erase whole memory electrically • Entire flash memory can erased in one or few seconds (faster than EPROM) • Possible to erase just blocks • Impossible to erase byte-level • Use only one transistor per bit • Achieves high density

  32. Memory Cell Operation Semiconductor main memory

  33. Chip Logic Semiconductor main memory • A 16Mbit chip can be organised as 1M of 16 bit words • A bit per chip system has 16 lots of 1Mbit chip with bit 1 of each word in chip 1 and so on • A 16Mbit chip can be organised as a 2048 x 2048 x 4bit array • Reduces number of address pins • Multiplex row address and column address • 11 pins to address (211=2048) • Adding one more pin doubles range of values so x4 capacity

  34. Refreshing Semiconductor main memory • Refresh circuit included on chip • Disable chip • Count through rows • Read & Write back • Takes time • Slows down apparent performance

  35. Typical 16 Mb DRAM (4M x 4) Semiconductor main memory

  36. Typical Memory Package Pins & Signals Semiconductor main memory

  37. Chip Packaging Semiconductor main memory • Pins support following signal lines • Address of word being accessed • For 1M words, a total of 20(220=1M) pins needed(A0-A19) • Data to be read out, consisting of 8lines(D0-D7) • Power supply to the chip(Vcc) • Ground pin(Vss) • Chip enable (CE)pin • Program voltage(Vpp) that supplied during programming(writing operation)

  38. Module Organization Semiconductor main memory • How a memory module consisting of 256K 8-bit words could be organization • For 256K word, 18-bit address needed and supplied to the module from external source

  39. 256 kbyte Memory Organization Semiconductor main memory

  40. Module Organization Semiconductor main memory • Possible organization of memory consisting of 1M word by 8bit per word • Need four columns of chips, each column containing 256K words arranged

  41. 1-Mbyte Memory Organisation Semiconductor main memory

  42. Error Correction Semiconductor main memory • Hard Failure • Permanent physical defect • Memory cell or cell affected cannot reliably store data • Stuck at 0 or 1or switch erratically between 0 and 1 • Caused by harsh environmental abuse, manufacturing defects and wear • Soft Error • Random, non-destructive • No permanent damage to memory • Caused by power supply problems or alpha particles • Detected using Hamming error correcting code

  43. Error - Correcting Code Semiconductor main memory

  44. Error Correction Semiconductor main memory • If M-bit word of data stored, and code is K bit, then actual size of stored word is M+K bits • New set of K code generated from M data bits compared with fetched code bits • Comparison one of three results • No errors detected therefore fetched data bits sent out • An error detected and possible to correct error then data bit plus error-correction bits fed into corrector which produce corrected set of M bits set out • An error detected, but impossible to correct this condition reported

  45. Hamming Error-Correcting Code Semiconductor main memory

  46. Hamming Code Semiconductor main memory • Parity bits • By checking the parity bits, discrepancies found in circle A & circle C, but not in circle B • Only one of the seven compartments is in A&C but not B • Syndrome word result of comparison of bit-by-bit • Each bit of syndrome is 0 or 1 according to if there is or is not a match in position for two input • Syndrome word is K bit wide and has range between 0 and 2K-1

  47. Increase in Word Length Semiconductor main memory

  48. Error Correction Semiconductor main memory • To generate 4-bit syndrome with follow • If syndrome contains all 0s, no error detected • If syndrome contains one & only one bit set to 1, error occurred in one of 4 check bits. No correction needed • If syndrome contains more than one bit set to 1, numerical value of syndrome indicates position of data bit in error. This data bit inverted for correction • Position numbers are powers of 2 designated as check bits

  49. Layout of Data Bits & Check Bits Semiconductor main memory • To achieve these characteristics, data and check bits arranged into a 12-bit word as depicted • Bit position whose position numbers are powers of 2 designated as check bits

  50. Layout of Data Bits & Check Bits Semiconductor main memory

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