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Improved Design of High-Performance Parallel Decimal Multipliers. Han Liu Supervisor: Seok-Bum Ko Electrical & Computer Engineering Department 2010-Mar-9. Outline. Information of literature Background Decimal Coding

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improved design of high performance parallel decimal multipliers

Improved Design of High-Performance Parallel Decimal Multipliers

Han Liu

Supervisor: Seok-Bum Ko

Electrical & Computer Engineering Department 2010-Mar-9

outline
Outline
  • Information of literature
  • Background
  • Decimal Coding
  • Partial Product Generation
  • Multiplier Architecture
  • Partial Product Reduction
  • Comparison
  • Conclusion
information of literature
Information of literature

Improved Design of High-Performance Parallel Decimal Multipliers

Alvaro Vazquez, ElisardoAntelo, and Paolo Montuschi

IEEE TRANSACTIONS ON COMPUTERS 2009 Nov.

background
Background
  • Multiplication Operation
  • Parallel and Serial Multiplication
    • How to add the partial product together
    • Tradeoff of Area and Latency
decimal coding
Decimal Coding

Fast ×5 and ×2 with coding conversion (no carry propagation)

N_5211 × 2 (LS2) = 2N_4221

N_4221 × 5 (LS3) = 5N_5211

partial product generation 1 3
Partial Product Generation 1/3

For calculating X10 × Y10, we need {0, X, 2X, 3X, … , 9X}, this is called partial product

SD Radix-10: convert Decimal set {0,…,9} to SD set {-5,…,0,…,5}, then

Only {0, X, 2X, 3X, 4X, 5X} are needed to be implemented.

SD Radix-5: Y=5 × YU+ YL, then

Only YU set {0, 5X, 10X} and YL set {-2X, -X, 0, X, 2X} are needed to be implemented.

partial product generation 2 3
Partial Product Generation 2/3

Radix-5 PP Generation

partial product generation 3 3
Partial Product Generation 3/3

Radix-10 SD PP Generation

multiplier architecture
Multiplier Architecture

Radix-10 Parallel Multiplier

Radix-5 Parallel Multiplier

comparison
Comparison

[9] L. Dadda

[20] T. Lang

[12 13 19] M. J. Schulte

conclusion
Conclusion
  • SD radix-10 and radix-5 parallel multiplication are interesting option for higher performance with moderate area
  • For higher performance the choice is the SD radix-5 architecture, although both designs have very close figures.
question
Question

Thanks!

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