html5-img
1 / 70

Mutual exclusion

Mutual exclusion. read/write variables. The Bakery Algorithm. The algorithm is similar with the read-modify-write algorithm. There is a queue: The process in the head is in critical section A new process is inserted in the tail. Algorithm outline.

carlow
Download Presentation

Mutual exclusion

An Image/Link below is provided (as is) to download presentation Download Policy: Content on the Website is provided to you AS IS for your information and personal use and may not be sold / licensed / shared on other websites without getting consent from its author. Content is provided to you AS IS for your information and personal use only. Download presentation by click this link. While downloading, if for some reason you are not able to download a presentation, the publisher may have deleted the file from their server. During download, if you can't get a presentation, the file might be deleted by the publisher.

E N D

Presentation Transcript

  1. Mutual exclusion read/write variables

  2. The Bakery Algorithm The algorithm is similar with the read-modify-write algorithm There is a queue: The process in the head is in critical section A new process is inserted in the tail

  3. Algorithm outline t = tail; tail = tail + 1; Wait until t == head; Entry: Critical section Exit: head = head + 1; (tail and head are shared variables, t is a local variable)

  4. Problem: this part of the code doesn’t behave correctly //read tail t = tail; tail = tail + 1; Entry: //write tail

  5. A good scenario 0 tail

  6. A good scenario (t=0) 0 Read 0 Write 1 1 tail

  7. A good scenario (t=1) 1 0 Read 1 Write 2 2 tail

  8. A good scenario (t=2) 1 2 0 Read 2 Write 3 3 tail

  9. A bad scenario 0 Read 0 0 tail

  10. A bad scenario 0 0 Read 0 Write 1 Write 1 (delayed) 1 tail

  11. A bad scenario 0 1 0 Write 1 (delayed) Read 1 Write 2 2 tail

  12. A bad scenario 0 1 0 Read 2 Write 3 Write 1 (delayed) 2 3 tail

  13. A bad scenario 0 1 0 Write 1 Read 2 Write 3 2 1 Wrong value!!! tail

  14. A Solution: distributed counting V[1]=0 V[2]=0 V[3]=0 V[4]=0 0 0 0 0 We need an array of shared variables v[1], v[2], …, v[n] Process has value v[i]

  15. V[1]=0 V[2]=0 V[3]=0 V[4]=0 0 0 0 0 In the entry code, a process reads the values of all other processes. The new value is the maximum + 1

  16. V[1]=0 V[2]=1 V[3]=0 V[4]=0 0 1 0 0 entry Max = 0; Max + 1 = 1;

  17. V[1]=0 V[2]=1 V[3]=0 V[4]=2 0 1 0 2 entry entry Max = 1; Max + 1 = 2;

  18. V[1]=0 V[2]=1 V[3]=3 V[4]=2 0 1 3 2 entry entry entry Max = 2; Max + 1 = 3;

  19. V[1]=4 V[2]=1 V[3]=3 V[4]=2 4 1 3 2 entry entry entry entry Max = 3; Max + 1 = 4; Everybody gets a unique value (a unique position in the distributed queue)

  20. V[1]=4 V[2]=1 V[3]=3 V[4]=2 4 1 3 2 entry entry entry entry Then the processes compare their values with all the other values. The lowest value enters the critical region (different than 0)

  21. V[1]=4 V[2]=1 V[3]=3 V[4]=2 4 1 3 2 critical region entry entry entry reads all values Realizes it has the lowest value

  22. V[1]=4 V[2]=0 V[3]=3 V[4]=2 0 4 3 2 entry entry entry exit sets value to 0

  23. V[1]=4 V[2]=0 V[3]=3 V[4]=2 4 0 3 2 critical region entry entry

  24. V[1]=4 V[2]=0 V[3]=3 V[4]=0 4 0 3 0 entry entry exit

  25. V[1]=4 V[2]=0 V[3]=3 V[4]=0 4 0 3 0 entry critical region And so on……

  26. A problem: When two processes enter at the same time, they may choose the same value. V[1]=0 V[2]=0 V[3]=0 V[4]=0 0 0 0 0 entry entry

  27. The maximum values they read are the same V[1]=0 V[2]=1 V[3]=0 V[4]=1 0 1 0 1 entry entry

  28. Solution: use ID’s to break symmetries (lowest ID wins) V[1]=0 V[2]=1 V[3]=0 V[4]=1 1, 4 0 0 1, 2 critical section entry

  29. V[1]=0 V[2]=0 V[3]=0 V[4]=1 0 1, 4 0 0 exit entry

  30. The Complete Bakery Algorithm Process i: V[i] = 0; choosing[i] = false; Entry: choosing[i] = true; V[i] = max(V[1], V[2], …, V[n])+1; choosing[i] = false; for (k = 1; k <= n; k++) Wait until choosing[k] == false; Wait until V[k] == 0 or (V[k],k) > (V[i],i) Critical section Exit: V[i] = 0;

  31. Advantages of the bakery algorithm: • Uses Read/Write variables • Satisfies no lockout property Disadvantages: • Uses n shared variables for n processes (actually, we cannot do better than that) • The values can grow unbounded (we would like to find an algorithm with bounded values)

  32. Mutual Exclusion for 2 processes high priority process low priority process Entry: Want[0] = 1; Wait until want[1]== 0; Critical section Want[0] = 0; 1: Want[1] = 0; Wait until want[0] ==0; Want[1] = 1; if (want[0] == 1) goto 1; Critical section Want[1] = 0; Exit: Good: Uses only bounded values on variables Problem: low priority process may lockout

  33. An equal priority algorithm Process 0 Process 1 Entry: 1: Want[0] = 0; Wait until (want[1]== 0 or Priority == 0); Want[0] = 1; if priority == 1 then if Want[1] == 1 then goto Line 1 Else wait until Want[1]==0; Critical section Priority = 1; Want[0] = 0; 1: Want[1] = 0; Wait until (want[0]== 0 or Priority == 1); Want[1] = 1; if priority == 0 then if Want[0] == 1 then goto Line 1 Else wait until Want[0]==0; Critical section Priority = 0; Want[1] = 0; Exit: Good: Uses only bounded values on variables Supports no lockout

  34. The Tournament Algorithm We can implement a tournament mutual exclusion algorithm, using the equal priority pairwise algorithm

  35. Mutual exclusion for pairs of processes winner

  36. Critical section winner

  37. Advantages of tournament algorithm • O(n) variables • Bounded values of variables • Preserves no lockout • (since each pair mutual exclusion • is no lockout)

  38. MCS Mutual Exclusion Algorithm head tail Lock=0 Lock=1 Lock=0 Lock=0 next next next next nil T Process in critical region Process waiting to get in critical region

  39. Local memories (for example cache) head tail Lock=0 Lock=1 Lock=0 Lock=0 next next next next nil Processes Spin on their own memories T Global Shared Memory

  40. head tail Lock=0 Lock=1 Lock=0 Lock=0 next next next next nil Critical region T

  41. head tail Lock=1 Lock=1 Lock=0 Lock=0 next next next next nil Critical region T

  42. head tail Lock=1 Lock=1 Lock=0 next next next nil Critical region T

  43. head tail Lock=1 Lock=1 next next nil T Critical region

  44. nil T

  45. Entry Code for processor i: Qi = pointer to a new queuenode; // Qi, *Qi is in local memory Qi->Lock = 0; Qi->Next = nil; Ti = Swap(T, Qi); //Ti is in local memory If Ti nil then Ti -> next = Qi; else Qi->Lock =1; //it is at the head of the queue Wait until Qi->lock = 1;

  46. Atomic operation Swap(T,Qi) { x = T; //read T T = Qi; // swap T with Qi return x; // return old value of T }

  47. Qi Empty queue nil Lock=0 next nil T Qi is created

  48. Qi nil Lock=0 next nil Ti T After swap operation

  49. Qi in critical section Lock=1 next nil T After if statement

More Related