Simulation and modelling 7 verification
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Simulation and Modelling 7 – Verification. Yumarsono Muhyi STMIK Supra Even Semester 2008/2009 June 11th, 2009. About Me. Yumarsono Muhyi Head of Information System Dept., STMIK Supra Undergraduate of Electrical Engineering, Telecommunication - ITB

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Simulation and Modelling 7 – Verification

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Simulation and Modelling7 – Verification

Yumarsono Muhyi

STMIK Supra

Even Semester 2008/2009

June 11th, 2009


About Me

  • Yumarsono Muhyi

  • Head of Information System Dept., STMIK Supra

  • Undergraduate of Electrical Engineering, Telecommunication - ITB

  • Management Magister, Sistem Informasi - UPN (final semsester dan thesis)

  • Research Field: Computation, Operational Research, Optimation, Simulation

  • y.muhyi@gmail.com (email and chat)

  • y.muhyi@yahoo.com (mostly chat)

  • 0856-9117-2669 / (021) 93131-633


Lessons

  • Introduction

  • Divide-and-Conquer Approach

  • Animation

  • Advancing the Simulation Clock

  • Writing to an Output File


1. Introduction

  • Verification:

    • “Building the model correctly.”

    • Verification is the continuous process of insuring that the model operates as intended.

    • Verified model:

      • Include all of the components specified under the system definition phase.

      • Actually be able to run without any errors or warnings.

  • Validation:

    • “Building the correct model.”

    • Validation is the process of insuring that the model represents reality.


2. Divide-and-Conquer Approach

  • Anything but the simplest system will require a significant amount of model programming.

  • Simulation programs can benefit from the divide-and-conquerapproach.

  • This means that the practitioner should break the larger, more detailed system modelinto a smaller, simpler, perhaps higher-level model.

  • The smaller, simpler model will be correspondinglyeasier to debug.


3. Animation

  • Animation: to visualize what the program is doing makes it easier to detect errors in the program.

  • Animationcan be used for model verification in many different ways:

    • Using different entity pictures for different types of entities

    • Following the entities through the system

    • Changing entity pictures

    • Displaying global variables or entity attribute values

    • Displaying plots of global variables or entity attributes

    • Displaying levels of system statistics


4. Advancing the Simulation Clock Event by Event

  • Simulation model animations are usually designed to run in compressed time.

  • To allowpractitioners to debug their models under controlled circumstances, most simulation software packageshave VCR-like controls.

  • These allow the practitioner not only to step through the model but also to fastforward to the part of the model the practitioner is interested in viewing.


5. Writing to an Output File

  • What to record (output file type):

    • Event List File

    • Variable or Attribute Output File


The End

  • Discussion.

  • Question and answer.

  • Case study.


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