mips on fleet
Download
Skip this Video
Download Presentation
MIPS on FLEET

Loading in 2 Seconds...

play fullscreen
1 / 15

MIPS on FLEET - PowerPoint PPT Presentation


  • 179 Views
  • Uploaded on

MIPS on FLEET. Amir Kamil. Goals. Run most MIPS assembly code on FLEET Attempt to duplicate level of support in SPIM interpreter MIPS assembly translated to FLEET assembly Small set of SHIPs used to implement MIPS operations Register file abstraction provided

loader
I am the owner, or an agent authorized to act on behalf of the owner, of the copyrighted work described.
capcha
Download Presentation

PowerPoint Slideshow about ' MIPS on FLEET' - bryony


An Image/Link below is provided (as is) to download presentation

Download Policy: Content on the Website is provided to you AS IS for your information and personal use and may not be sold / licensed / shared on other websites without getting consent from its author.While downloading, if for some reason you are not able to download a presentation, the publisher may have deleted the file from their server.


- - - - - - - - - - - - - - - - - - - - - - - - - - E N D - - - - - - - - - - - - - - - - - - - - - - - - - -
Presentation Transcript
mips on fleet

MIPS on FLEET

Amir Kamil

goals
Goals
  • Run most MIPS assembly code on FLEET
    • Attempt to duplicate level of support in SPIM interpreter
    • MIPS assembly translated to FLEET assembly
    • Small set of SHIPs used to implement MIPS operations
    • Register file abstraction provided
  • Eventual goal: run C code on FLEET
    • Compile C  MIPS  FLEET
mips instructions
MIPS Instructions
  • Each instruction is implemented as a codebag
  • When an instruction is done, it sends the next instruction codebag to the FetchShip
  • The next instruction’s release is predicated on notification from the previous instruction that it is done
instruction example
Instruction Example
  • Example: AND $t0, $s0, $s1

PC0x400000: {

copy s0fifo.out  logic.A

copy s1fifo.out  logic.B

“AND”  logic.cmd

move token.out  logic.out

move logic.out  t0fifo.in

move t0fifo.out  ()

accept+ack t0fifo.in  fetch.release

PC0x400400  fetch.codebag

move fetch.done  ()

}

mips registers
MIPS Registers
  • Registers implemented using FIFOs
  • Operations
    • Initialization: add 0 to FIFO
    • Read: copy output
    • Write: move input to FIFO, send output to bitbucket

0

x

y

mips alu operations
MIPS ALU Operations
  • ALU operations
    • Addition (ADD, ADDI, ADDIU, ADDU)
    • Subtraction (SUB, SUBU)
    • Multiplication (MULT, MULTU)
    • Division (DIV, DIVU)
    • Shifts (SLL, SLLV, SRA, SRAV, SRL, SRLV)
    • Logic (AND, ANDI, OR, ORI, XOR, XORI, NOR)
arithmetic implementation
Arithmetic Implementation
  • Addition and subtraction implemented directly using ArithmeticShip
  • Signed multiplication uses Dominic’s MultiplierShip
  • Unclear what to do for division and unsigned multiplication
    • Can build on top of ArithmeticShip, MultiplerShip, and ShiftShip, but result complicated and slow
    • Can also build into hardware, on top of MIPS instructions, or a combination of the above
logic implementation
Logic Implementation
  • Logical operations can be built either on top of the BitwiseShip, or on a simpler LogicShip
    • Since no one has built a BitwiseShip, I’m using a LogicShip for now
    • Commands: AND, OR, XOR, NOR

Inbox

Logic Ship

DataAin::int

Inbox

Outbox

DataBin::int

DataOut::int

Inbox

Commandin::int

shift implementation
Shift Implementation
  • Shift operations can use the IES31 ShiftShip
    • However, lots of operations required to perform a shift of more than 1
    • Also, complicated to implement variable shifts
    • Can use new ship:
    • Commands: SLL, SRA, SRL

Inbox

Shift Ship

DataAin::int

Inbox

Outbox

DataBin::int

DataOut::int

Inbox

Commandin::int

mips control flow operations
MIPS Control Flow Operations
  • Control flow operations
    • Branches (BEQ, BGEZ, BGTZ, BLEZ, BLTZ, BNE)
    • Jumps (J, JAL, JALR, JR)
  • Set operations
    • Set on less than (SLT, SLTI, SLTIU, SLTU)
comparisons
Comparisons
  • Branches and sets compare values, so a ComparatorShip needs to be defined
    • Can use ArithmeticShip, but slower and more complicated
    • Commands: EQ, NEQ, GT, GEQ, LT, LEQ

Inbox

Comparator

Ship

DataAin::int

Inbox

Outbox

DataBin::int

DataOut::boolean

Inbox

Commandin::int

selections
Selections
  • Branches and sets also select between two values
    • The SELECT command on the ArithmeticShip can be used to do so
    • Example: BEQ $s, $t, off

PC+1

Arith

Fetch

$s

PC+off

Comp

$t

SELECT

EQ

mips memory access operations
MIPS Memory Access Operations
  • Memory access operations
    • Loads (LB, LBU, LUI, LH, LHU, LW)
    • Stores (SB, SH, SW)
  • Memory byte-addressed, so need new byte-addressed memory ships
    • Example: SW $t, off($s)

$s

Arith

Byte

Mem

Write

off

0

ADD

1

0

$t

other mips operations
Other MIPS Operations
  • Register moves (MFHI, MTHI, MFLO, MTLO)
    • Easy to implement
  • System calls (SYSCALL)
    • Only a few calls implemented
  • Floating point instructions
    • Not implemented
future work
Future Work
  • Add more complete support for system calls
    • Need I/O specification for FLEET first
  • Add floating point instructions
    • Need floating point specification for FLEET first
  • Optimize instruction sequencing logic
    • Remove sequencing where it is unnecessary
  • Add support for instruction-level parallelism
    • Take advantage of duplicated SHIPs, or even multiple FLEETs
ad