Temporofunctional Crosstalk Noise Analysis

1. Temporofunctional Crosstalk Noise Analysis Yajun Ran UC Santa Barbara Alex Kondratyev Cadence Berkeley Labs Donald Chai UC Berkeley Yosinori Watanabe Cadence Berkeley Labs Kenneth Tseng Cadence Design Systems Malgorzata Marek-Sadowska UC Santa Barbara

2. Outline • Motivation • Electrical to Boolean • Efficiency of SAT approach • Conclusions

3. C C c c V V Vdd/2 Functional noise Delay noise A A Crosstalk Noise Victim Aggressor 1 Aggressor 2

4. Match Time Place Crosstalk Sources

5. Match Time Place Crosstalk Sources

6. Match Time Place Crosstalk Sources

7. Noise Analysis in Design Flow Synthesis/place-and-route RC extraction SPEF Timing windows Repairs Noise Analysis (CeltIC) Noise Violations Timing windows with noise Strong aggressors Pruning by timing and functionality (SAT) Delay faults

8. Prior Work • False path analysis • Devadas’93 • Single and two-vector sensitization analysis • McGeer’93 • SAT solving for timed Boolean functions • Functional correlation analysis • P.Chen, K.Keutzer’ 99 • Capturing functional correlations in SAT • A.Glebov’01 • Implication-based method

9. Decision problem: Given: interval T=[ t1,t2 ] and set of transitions Tr={a ,b ,…} Find: whether Tr might occur within T r f Optimization problem: Given: interval T=[ t1,t2 ] and set of transitions Tr={a ,b ,…} Find: the largest subset of Tr that might occur within T r f Temporofunctional Formulation Both problems check feasibility of switching patterns!!!

10. = 1 1 z T Waveforms to Boolean T=[ t1,t2 ] Vdd Vdd/2 t2 t1

11. = 1 1 0 z z T T = 1 Waveforms to Boolean T=[ t1,t2 ] Vdd Vdd/2 t2 t1

12. = 1 f 0 1 z z z T T T = 1 = 1 Waveforms to Boolean T=[ t1,t2 ] Vdd Vdd/2 t2 t1

13. 4-variable modeling: ; ; ; Different from 4-value!! (non mutually exclusive) = 1 r f 1 1 0 0 f z z z z z z z T T T T T T T = 1 = 1 Waveforms to Boolean T=[ t1,t2 ] Vdd Vdd/2 t2 t1 Abstraction with a reasonable accuracy!

14. D =[d1,d2] a Backward propagation Da a delay from a to z z Db b

15. D =[d1,d2] a ab a = * r r 1 r r 1 b z z a a b T-Dab T T T-Da T-D T-D Backward propagation Da delay from a to z Db

16. D =[d1,d2] a b ab a ab = + * * r 1 r r r r r 1 1 1 a a z b a z b a b b T-Db T T-Dab T-Dab T T-Da T-D T-D T-D T-D Backward propagation Da delay from a to z Db Transitions  Characteristic functions  CNF  SAT solving

17. Merge of propagated windows Pruning by arrival windows Making it Robust Reconvergent paths Blow up Boolean variables

18. Pruning by Arrival Windows • No accuracy loss • Helps, but does not guarantee to keep the problem tractable

19. Threshold=3 Merge of Propagated Windows

20. Merge of Timing Windows Threshold=3 • Loss of accuracy (reasonable) • Keeps the problem linear from the circuit size

21. Single Net Delay Analysis Decision problem: Is maximal delay noise feasible at net A? (single SAT instance to solve) Optimization problem: What is the maximal amount of delay noise feasible at A? (multiple SAT instances to solve, binary search e.g.)

22. Experimental Results Results for about 20 MCNC benchmarks confirm well with ind. designs

23. Conclusions • SAT-based analysis is scalable • Taking into account timing and functionality filters about 20% ofdelay faults • In path delay estimation the impact should be more profound (on-going work) Thank You