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University of Santiago de Compostela's Contributions to LHCb Project

This talk highlights the University of Santiago de Compostela's role in the construction and installation of the LHCb experiment at CERN, focusing on their responsibilities in the assembly of IT stations, production of Faraday cages, design of control boards, and HV and LV power implementation for the Silicon Tracker. The talk also discusses their activity in trigger and analysis and the LHCb upgrade.

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University of Santiago de Compostela's Contributions to LHCb Project

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  1. University of Santiago de Compostela Current HEP group members: Bernardo Adeva Andany Maximo Plo Casasús Juan J. Saborido Silva GRID José A. Hernando Morata Abraham Gallas Torreira Pablo Vázquez Regueiro ILC IPs Marcos Seco Miguélez Carmen Iglesias Escudero Posdocs Antonio Romero Vidal Dirac Diego Martínez Santos José L. Fungueiriño Pazos Dirac Xabier Cid Vidal Celestino Rodríguez Cobo Ph. D students Daniel Esperante Pereira Pablo Rodríguez Pérez Eliseo Pérez Trigo Antonio Pazos Álvarez Technologists Bernardo Adeva Andany / USC Madrid CSIC May, 27 2008 LHCb project

  2. “Search for new physics at the LHCb experiment at CERN “ USC group shares (20%) with U. Zurich, EPFL Lausanne and U. Heidelberg the construction of the LHCb Silicon Tracker (300k channels) • Our responsibility as stated in the TDR is: • Assembly of IT stations with EPFL (50%) • Silicon Tracker services (HV,LV,ECS) OUTLINE OF TALK : 1 - USC responsibility and plans in ST production and installation 2 - Activity in Trigger and Analysis 3 - LHCb upgrade 4 - Project summary Bernardo Adeva Andany / USC Madrid CSIC May, 27 2008 LHCb project

  3. FULL RESPONSIBILITY OF BONDING OF LHCb INNER TRACKER STATIONS Kulicke&Soffa 6090 automatic bonder Assembly team from Santiago at CERN B186 Detector plane after assembly: Precision Pull-tester Realisation of several million bonds. Assembly took 2.5 years. Bonding must hold over 10 years. Bernardo Adeva Andany / USC Madrid CSIC May, 27 2008 LHCb project

  4. DEVELOPMENT BY USC OF TEMPERATURE CYCLING DEVICE FOR INNER TRACKER ELECTRONICS ASSEMBLY Control electronics monitoring setup Insulation , Peltier contacts Bernardo Adeva Andany / USC Madrid CSIC May, 27 2008 LHCb project

  5. FULL PRODUCTION OF FARADAY CAGES OF INNER TRACKER STATIONS All built at Santiago university and shiped to CERN Extra-light material, many control sensors, metallic deposition Cooperation with Grupo de Aplicaciones del Laser at ETS Ferrol Bernardo Adeva Andany / USC Madrid CSIC May, 27 2008 LHCb project

  6. Sensor + readout hybrids BACKPLANE 5m copper cables Optical fibres for physics data Digitizer Board … LV power Up to 8 Hybrids/Dig Boards (6 in TT Svce Boxes) … Digitizer Board ECS Control Board TTC Digitizer Board … Up to 8 Hybrids/Dig Boards (6 in TT Svce Boxes) … Digitizer Board DETECTOR BOX SIDE SERVICE BOX SIDE DESIGN AND PRODUCTION OF SILICON TRACKER CONTROL BOARDS Bernardo Adeva Andany / USC Madrid CSIC May, 27 2008 LHCb project

  7. DESIGN AND PRODUCTION OF SILICON TRACKER CONTROL BOARDS Successful PRR at CERN 60 boards produced LabCircuits (PCBs) CERN/FIRSTEC (assembly) TEYDISA (prototypes) Bernardo Adeva Andany / USC Madrid CSIC May, 27 2008 LHCb project

  8. DEVELOPMENT OF ELECTRONICS SETUP FOR INNER TRACKER PRODUCTION TESTING LabView (Windows) LabView (Linux) Temp Cycling software TCP DAQ sudo DelScan DAQ program SPECS DIM Gb eth ParallelPort ControlCard ReadoutSupervisor Tell1 TemperaturecyclingBox control electronics Temp. Cycling Box Dig Board Ladders Bernardo Adeva Andany / USC Madrid CSIC May, 27 2008 LHCb project

  9. USC IS RESPONSIBLE OF HV AND LV POWER OF SILICON TRACKER (IT AND TT STATIONS) Mapping of ST high voltage system :  constrained by overall budget and fully implemented Bernardo Adeva Andany / USC Madrid CSIC May, 27 2008 LHCb project • 3 readout sectors are supplied by 1 HV channel for TT (except in the inner part where 1 readout sector is supplied by 1 HV channel) • Save money but loss individual ladder monitoring • 4 ladders are supplied by 1 HV channel for IT • Ladders / readout sectors in the same group share the same supply voltage • Jumpers in the patch panel allows to disconnect individual ladders/readout sector

  10. INSTALLED HV POWER SUPPLIES FOR INNER TRACKER Front view Rear view HV patch panel with 1:4 splitting Bernardo Adeva Andany / USC Madrid CSIC May, 27 2008 LHCb project

  11. Current IT HV patch panel -HV +HV 84 HV channels input 4 ladders 336 HV channels output 1 hv channel jumpers IT box HV partitioning 1:4 15 cables with 84 HV channels from 1 CAEN crate with 8 modules 12 cables with 336 HV channels to 12 detector boxes Bernardo Adeva Andany / USC Madrid CSIC May, 27 2008 LHCb project

  12. Upgraded IT HV patch panel -HV +HV 336 HV channels output 1 hv channel 1 ladder 336 HV channels input No jumpers 12 cables with 336 HV channels to 12 detector boxes 56 cables with 336 HV channels From 2 CAEN crates with 28 modules IT box HV partitioning 1:1 MUCH SAFER FROM OPERATIONAL POINT OF VUE TIGHT FINANCIAL CONSTRAINTS DURING CONSTRUCTION Bernardo Adeva Andany / USC Madrid CSIC May, 27 2008 LHCb project

  13. WHAT IS NEEDED FOR THE SILICON TRACKER HV UPGRADE :  part-time job for a hired physicist with knowledge of electronics Bernardo Adeva Andany / USC Madrid CSIC May, 27 2008 LHCb project • To purchase • 2 CAEN crates (1 for IT + 1 for TT) • 31 CAEN modules (20 for IT + 11 for TT) • Remake the IT and TT HV patch panels in the HV racks • With channel re-grouping • Without jumpers • Make extra cables from CAEN power supplies to HV patch panels

  14. USC CONTRIBUTION TO ECS SYSTEM OF SILICON TRACKER ECS project magnitude: • IT infrastructure: • 336 Ladders  1008 Beetles • 336 Dig Boards  1008 GOLs + 336 DCUs • 24 Ctrl Boards  48 SPECS slaves + 24 TTCrq + 24 Dealy25 chip + 24 DCUs • 42 TELL1 • 84 HV Channels  1 CAEN crate + 8 A1511 modules • 48 LV MARATON Channel modules • Cooling system • Detector Safety system • TT infrastructure: analogous and similar size structure • Summary: ECS must control ~270,000 electronics readout channels: >4,000 chips, ~190,000 registers, ~1,000 temperature channels … Bernardo Adeva Andany / USC Madrid CSIC May, 27 2008 LHCb project

  15. TASKS CARRIED OUT BY SANTIAGO GROUP • Design, development and commissionning of control system for ST: • Full control logics • User interfaces • Coordination of the development team: • Daniel Esperante*(USC), Pablo Rodríguez(USC), Alba Sambade(USC), Angela Buechle(U. Zurich), Vincent Fave(EPFL)… • Supervision of Proyecto Fin Carrera: “Implementación y desarrollo de un sistema de control distribuido para el experimento LHCb”, Alba Sambade, now at “Online” group of LHCb at CERN. • Doctoral thesis of Daniel Esperante (to be defended soon), and Pablo Rodríguez (2nd year). • Responsible for permanent contact with LHCb “Online System” for the Silicon Tracker. • PVSS system developers for production tests at the laboratory for the Inner Tracker electronics. Bernardo Adeva Andany / USC Madrid CSIC May, 27 2008 LHCb project

  16. LHCb Control Units DCS HV DAQ DAQI IT_DAQI IT_DCS IT_HV IT_DAQ IT_HV_ST3C IT_HV_ST1A IT_HV_ST2A IT_HV_ST1C IT_HV_ST3A IT_DAQ_ST3A IT_HV_ST2C IT_DCS_ST1A IT_DCS_ST3C IT_DAQ_ST1A IT_DAQ_ST2A IT_DCS_ST2C IT_DAQ_ST3A IT_DAQ_ST1C IT_DAQ_ST2C IT_DCS_ST1C IT_DCS_ST3A IT_DCS_ST2A IT_HV_ST2C_BOXT IT_HV_ST2C_BOXC IT_DAQ_ST2C_TELL1 IT_DCS_ST2A_LV IT_DCS_ST2A_GAS IT_DCS_ST2A_HUM IT_DAQ_ST2C_FE_BOXC IT_DCS_ST2A_COOLING IT_DCS_ST2A_TEMP IT_DAQ_ST2C_FE_BOXT Sistema de control jerarquizado del IT • Nodos desde los que el sistema global de LHCb va a tomar el control de nuestro detector • Nodos de control de nuestro sistema Bernardo Adeva Andany / USC Madrid CSIC May, 27 2008 LHCb project

  17. Ejemplo de la interfaz de usuario para el control HV del Inner Tracker (IT) Bernardo Adeva Andany / USC Madrid CSIC May, 27 2008 LHCb project

  18. INNER TRACKER INSTALLATION AT THE LHC Silicon Inner Tracker Boxes temporary beam pipe protection Bernardo Adeva Andany / USC Madrid CSIC May, 27 2008 LHCb project

  19. SANTIAGO AND LAUSANNE (EPFL) HAVE CARRIED OUT INNER TRACKER INSTALLATION Finger to alert contact with beam pipe Bernardo Adeva Andany / USC Madrid CSIC May, 27 2008 LHCb project

  20. INSTALLATION OF INNER TRACKER SERVICES Abraham Gallas Torreira Eliseo Pérez Trigo Carbon fibre pilar dry N2 HV Data+LV+control cables Bernardo Adeva Andany / USC Madrid CSIC May, 27 2008 LHCb project

  21. INNER TRACKER ELECTRONICS SERVICE BOXES INSTALLED optical fibre water cooling (regulators) Housing Digitizer Boards (U. Zurich) and Control Boards (U. Santiago) Bernardo Adeva Andany / USC Madrid CSIC May, 27 2008 LHCb project

  22. INNER TRACKER LV MARATON POWER SUPPLIES INSTALLED 380V dc Controls water cooling SHIELDED IN BUNKER UNDERNEATH TRACKER patch panels to allow short cables to detector Bernardo Adeva Andany / USC Madrid CSIC May, 27 2008 LHCb project

  23. LHCb SHIFTS ORGANIZATION 80 volontiers for LHCb, follow training courses In Silicon Tracker (IT+TT) , Santiago has agreed to contribute 20% of the shifts (with Zurich, Lausanne, Heidelberg): - several experts “ on call “ (also help write protocols) - significant component of students (share time with analysis) Significant impact on “ travel and perdiems “ budget Bernardo Adeva Andany / USC Madrid CSIC May, 27 2008 LHCb project

  24. Trigger System in LHCb 2 main subdivisions: L0 (Hardware) HLT (Software) - HLT1: Generic, partial reconstruction - HLT2: Exclusive, total reconstruction From detector to stored data • Some numbers • - Factor 10 L0 reduction (~10 MHz to ~1 MHz) • Factor 33 reduction HLT1 (~1 MHz to ~30 KHz) • Factor 15 reduction HLT2 (~30 KHz to ~2 KHz) Bernardo Adeva Andany / USC Madrid CSIC May, 27 2008 LHCb project

  25. TRIGGER SYSTEM IN LHCb Field of work of Jose Angel Hernando (USC/CERN). Also coordinating HLT1Framework and Trigger interaction with Reconstruction • HLT: Subdivision in HLT1 and HLT2: • HLT1: Confirmation of L0 objects (with T,VELO) and, optionally, IP cut • HLT2: Physics selections Bernardo Adeva Andany / USC Madrid CSIC May, 27 2008 LHCb project

  26. Trigger System in LHCb - Hadronic Alley • L0 Calo from L0 • Velo track matched to L0Calo • Confirmed (forward) track • Velo companion track • Forward companion track • Secondary vertex: confirmed + companion Bernardo Adeva Andany / USC Madrid CSIC May, 27 2008 LHCb project

  27. Recent example work – What triggers HLT1 Hadron Alley? • Research done by Jose Ángel Hernando and Xabier Cid Vidal (PhD student in USC). Trying to understand if we are triggering on tracks actually coming from a B in Hadron Alley of Trigger • Long tracks in HadHLT consistent in VELO segment+Tstations segment: Look at MCtruth and classify online tracks according to good or bad link to segments Found that ~50% of the events triggered on false tracks, and ~25% extra in tracks with problems in slope because of online misreconstruction. • Solution: Look at same tracks with offline quality (refinement) and apply same cuts: • Rate reduced almost 50 %! • Bad tracks fraction much smaller Bernardo Adeva Andany / USC Madrid CSIC May, 27 2008 LHCb project

  28. Bs  μ+μ- in LHCb Diego Martínez at 36th ITEP Winter School of Physics (2008) + • BR (Bs  μμ ) in SM:(3.55 ± 0.33)x10-9 (for Bd : (1.00 ± 0.14)x10-10) • Current limit (Tevatron) : BR< 4.7x10-8 @ 90% C.L, (for Bd :BR < 1.5x10-8) •  One order of magnitude from current upper limit to SM prediction !! This BR can be affected by New Physics, in particular SUSY models. MSSM: Enhancement ~tanβ6  larger value STRONG DISCOVERY / EXCLUSION POTENTIAL BY LHCb Bernardo Adeva Andany / USC Madrid CSIC May, 27 2008 LHCb project 28

  29. LHCb conditions • b physics experiment • Low angle spectrometer, but at center of masses • b produced at low angle • ~5 x 1011 bb/fb-1 • ( ~ 10 12 per n.year) • Trigger dedicated to select b events ( ~90% for reconstructed Bs  μμ) • Total number of Bsμμ events ~45 per n.y (if SM BR) (Interaction Point) 36th ITEP Winter School of Physics (2008) Bernardo Adeva Andany / USC Madrid CSIC May, 27 2008 LHCb project 29

  30. Diego Martínez 36th ITEP Winter School of Physics (2008) Invariant Mass PID Geometry Bs  μμ search strategy (I) • Reconstruction of μ+ μ- combinations on triggered events • Selection: apply some cuts on discriminant variables to remove the most important amount of background • Classify each event using three properties (bins in a 3D phase space): • Particle Identification (PID): Probability to be muons • Geometrical properties • Invariant Mass • Get the number of expected bkg. in the Bs mass region • using sidebands (events outside ±60 MeV of Bs Mass) • Use of control channels to get the probability, for • a signal event, to fall in each bin: • Geometry & Mass: Use of B h+h- • PID: Calibration muons (MIPs in calorimeter, J/Ψ muons) Bernardo Adeva Andany / USC Madrid CSIC May, 27 2008 LHCb project 30

  31. 10 -7 BR excluded at 90 % CL 2x10 -8 Expected limit at the end of Tevatron 5x10 -9 Diego Martínez at 36th ITEP Winter School of Physics (2008) LHCb potential Bernardo Adeva Andany / USC Madrid CSIC May, 27 2008 LHCb project 31

  32. BR observed at 3σ mapping of observed signal in CMSSM In case of Bs  μμObservation Phase Space region compatible with BR(Bsμμ) ~ 1x10 -8 mSUGRA Phase Space is strongly reduced as function of the BR seen (and its accuracy) BR ~ 5x10 -9 Diego Martínez at 36th ITEP Winter School of Physics (2008) Bernardo Adeva Andany / USC Madrid CSIC May, 27 2008 LHCb project 32

  33. STUDY OF CHANNEL Arosen from discussions at joint “LHCb-Theory Group” at CERN between Santiago group and Joaquim Matías (UAB), Phys. Rev. D 76, 074005 (2007) • K*0 meson decays into charged particles (K+-) • angular analysis possible at LHCb Not included in original goals of the experiment • Branching fraction yet unmeasured, expected relatively large for Bs : 9 x 10-6 • Penguin dominated b  s decay SENSITIVE AND PRECISE METHOD TO MEASURE S = 2 S AND PROBE NEW CPV PHASES Bernardo Adeva Andany / USC Madrid CSIC May, 27 2008 LHCb project

  34. Three observables can be reached by LHCb in 1) Longitudinal direct asymmetry 2) Related time-dependent asymmetries 3) Ratio of longitudinal branching ratios over Bernardo Adeva Andany / USC Madrid CSIC May, 27 2008 LHCb project

  35. topic brought about some recent interest: M. Ciuchini, M. Pierini and L. Silvestrini hep-ph/0703137 (2007) R. Fleisher and M. Gronau arXiv:0709.4013 (2007) and first measurement by BBAR on B0 channel arXiv:0708.2248 (2007) Very powerful and clean method for S measurement (Bs “golden channel”) Prospects are good in LHCb and channel pre-selection already developed by the Santiago group (Celestino Rodríguez Cobo) Bernardo Adeva Andany / USC Madrid CSIC May, 27 2008 LHCb project

  36. NEW LINE OF ANALYSIS BY SANTIAGO GROUP Study of b  s  transitions via b   (1520)  Possible wrong-helicity b  s  dipole coupling (G. Hiller et al. hep-ph/0702191 (2007) Supression of helicity-3/2 amplitude in SCET (QCD) Very large b statistics in LHCb Photon polarization asymmetries measurable in b   (1520)  and charge conjugate Hardly covered by LHCb working groups Viability study already existing (LHCb/2006-012) Would enhance the Barcelona-Santiago-CERN collaborationon rare b-decays Abraham Gallas has proposed to supervise a new student on this. Bernardo Adeva Andany / USC Madrid CSIC May, 27 2008 LHCb project

  37. USC Tier-3 for LHCb • Local computing infraestructure for the group analysis activities. • In LHCb, Tier-2 centers are devoted only to montecarlo production. • Assume 7 kSI2k and 2.5 TB needed for the average user, and 9 users. (From PASTA 2005) • 7 workstations for user interface to do analysis: 10 k€. • Computing room infraestructure (UPS power supply systems. Network infraestructure. Racks): 30 k€ Total cost of USC Tier-3 for LHCb: 75 k€ Bernardo Adeva Andany / USC Madrid CSIC May, 27 2008 LHCb project

  38. LHCb HIGH LUMINOSITY UPGRADE “Expression of Interest for an LHCb Upgrade” CERN/LHCC/2008-007 After collection of 10 fb-1 the experiment considers that an upgrade is technically feasible:  luminosity 10 times larger (2x1033 cm-2 s-1)  hadron trigger efficiency x2  collect ~ 100 fb-1 • Working group created and R&D lines proposed such: • development of 40 MHz front-end electronics for all subdetectors • DAQ system with estimated bandwidth of 5x104 Gbits/s • study modifications to tracking detectors (OT,IT,TT) Objective : TDR submission by 2010 Bernardo Adeva Andany / USC Madrid CSIC May, 27 2008 LHCb project

  39. IMPLICATION OF OUR GROUP IN TWO DIRECTIONS: INVESTIGATION OF 40 MHZ READOUT • Optical Read-out • New Read-out chip (GBT). • Optical transmission at least 2,5Gb/s. • Redesign of DAQ boards with new functionalities: • Buffering • Zero-suppression • Data packing • New TFC system CONTRIBUTION TO NEW SILICON TRACKER DESIGN AND RELATED TEST-BEAMS  Main tasks for a posdoc (also involved in ST operation) Bernardo Adeva Andany / USC Madrid CSIC May, 27 2008 LHCb project

  40. R&D IN OPTICAL LINKS FOR LHCb UPGRADE New Read Out Board model : Second stage prototyping First stage prototyping Bernardo Adeva Andany / USC Madrid CSIC May, 27 2008 LHCb project

  41. Available technologies • Multi-Drop Busses • Noise limited above ~200Mhz • VME, PCI • Switched fabrics (still parallel) • Source synchronous clk • clock skew limited above ~1Ghz • Rapid I/O, HyperTransport • Serial Switched fabrics • Eliminates traditional noise and clock skew issues. 10Gbps • PCI-Express, Infiniband • SERDES (SERializer-DESerializer) Bernardo Adeva Andany / USC Madrid CSIC May, 27 2008 LHCb project

  42. Parallel Fiber Optic Link Receiver • Reflex Photonics: 40 Gb/s SNAP 12 Parallel Fiber Optic Receivers • 12 independent parallel optical channels • Mechanical size : 49mm x 17mm x 11mm • Channel data rate of up to 3.5 Gb/s • 42 Gb/s per module • 10 Gb/s per channel in development • Low power comsumption < 1W per module • No heat sink required • Drop in compatible with SNAP 12 MSA connector • Both 62.5um and 50um multi mode ribbon fibers supported • 100m range with 62.5 um • 200m range with 50 um • Individual channel fault monitoring Bernardo Adeva Andany / USC Madrid CSIC May, 27 2008 LHCb project

  43. SERDES (SERializer DESerializer) options • Commercial receiver • Broadcom 1 channel 10 Gbps input : 16- 622Mbps outputs • Vitesse VSC7123: 4 channel 1.36Gbps • Mindspeed: 8 channel 2.5Gbps • Custom receiver built at CERN • OptoElectronics Working Group • FPGA based receiver • Xilinx : Virtex 4 RocketIO • Altera : Stratix II GX • 622-Mbps to 6.5Gbps transceiver rates • Lots of programmability for compliance with wide range of standards and protocols • PCI Express, OC-192, 10Gb Ethernet, Serial RapidIO • Devices available with 4, 8, 12, 16, or 20 high-speed serial transceiver channels providing up to 255 Gbps of serial bandwidth Bernardo Adeva Andany / USC Madrid CSIC May, 27 2008 LHCb project

  44. Work Plan • Build a small setup for: • Understanding and evaluating performance of high speed FPGA SERDES • Use an evaluation board for quick learning • Understanding and evaluating performance of high speed optical links • Using a purchased Reflex Photonics evaluation board + purchased transmitters and receivers • Perform studies on the FPGA capabilities for “quick” operations on the received data: Zero Suppression, buffering… • Design of a receiver board prototype. • Provides a “reasonable” design of single partition input. • It will handle 12 front end links (1 connector input). • This daughter board could be plugged into a FPGA evaluation mother board. • Further studies could be performed once the receiver prototype + mother board is ready: • Data formatting and packaging. • PC interfacing using Gbit Ethernet. New posdoc + electronician + Daniel Esperante Bernardo Adeva Andany / USC Madrid CSIC May, 27 2008 LHCb project

  45. Setup example 8 GHz Oscilloscope Reflex Photonics 12 channel transmitter and receiver evaluation board Altera Stratix II GX Transceiver Signal Integrity Development Kit SMA Transmit and Receive Connectors Bernardo Adeva Andany / USC Madrid CSIC May, 27 2008 LHCb project

  46. Intfce connector Altera SERDES FPGA Photonics receiver Optical read-out link prototype • Receiver board prototype: • Photonics receiver • Altera Stratix II GX FPGA SERDES (12 channels) • Interface connector • Custom PCB • Xilinx FPGA evaluation kit mother board • Virtex-4 FPGA • GBit ethernet Port • Embedded linux Bernardo Adeva Andany / USC Madrid CSIC May, 27 2008 LHCb project

  47. AT HOME: NEW 75 M2 LABORATORY IN SANTIAGO FOR HEP GROUP Clean room + CPU farm Clean room conditionning covered only partially by USC Bonding laboratory of LHCb Silicon Tracker now at B186 will be kept at CERN until LHC winter shutdown and return here in April 2009 Bernardo Adeva Andany / USC Madrid CSIC May, 27 2008 LHCb project

  48. TWO FPI FELLOWS REQUESTED Strong commitments in analysis, after important investment Two extra senior physicists with large experience willing to advice students: José A. Hernando and Abraham Gallas Significant physics impact of LHCb No FPI fellow in previous 3-year project Bernardo Adeva Andany / USC Madrid CSIC May, 27 2008 LHCb project

  49. SUMMARY OF REQUESTED BUDGET Equipment Upgrade LHCb ST HV system 171000 Power supply Maraton for PVSS tests 12000 Transmitter/receiver setup for Gb link 25500 8 Ghz Oscilloscope 67400 Tier3 infrastructure 75000 Silicon sensors 6000 Infrastructure for silicon MS test-beams 12000 Total 368900 Travel and perdiems 3-month stays at CERN 100000 Meetings, shifts, conferences 135000 Total 235000 Other LHCb cat. B ST 33000 Personnel Posdoc (ST maintenance + LHCb upgrade studies) 120000 Físico (Bs->2kst analysis C.R.) 45000 Físico (continuation Bs->mumu analysis X.C.) 45000 Físico (electronics expert, optical links+HV upgrade, E.P.) 45000 Total 255000 Total directos: 948900 Consumables Participation ASIC production front-end 15000 Clean room conditioning at USC 30000 Machining of support structures for test-beams 12000 Total57000 Bernardo Adeva Andany / USC Madrid CSIC May, 27 2008 LHCb project

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