1 / 24

VTX Electronics Integration

E.J. Mannel Columbia University DOE Review June 2-3, 2009. VTX Electronics Integration. Electronics Integration Tasks. System Testing FNAL chain test complete Power and Grounding V1 plan complete V2 plan in progress (75%) Power systems- Evaluation Bias system (100%)

blake-hunt
Download Presentation

VTX Electronics Integration

An Image/Link below is provided (as is) to download presentation Download Policy: Content on the Website is provided to you AS IS for your information and personal use and may not be sold / licensed / shared on other websites without getting consent from its author. Content is provided to you AS IS for your information and personal use only. Download presentation by click this link. While downloading, if for some reason you are not able to download a presentation, the publisher may have deleted the file from their server. During download, if you can't get a presentation, the file might be deleted by the publisher.

E N D

Presentation Transcript

  1. E.J. Mannel Columbia University DOE Review June 2-3, 2009 VTX Electronics Integration

  2. Eric J. Mannel mannel@nevis.columbia.edu Electronics Integration Tasks • System Testing • FNAL chain test complete • Power and Grounding • V1 plan complete • V2 plan in progress (75%) • Power systems- • Evaluation • Bias system (100%) • Low Voltage (40%) • Purchasing (10%)

  3. Eric J. Mannel mannel@nevis.columbia.edu Electronics Integration Tasks • Slow Control • Pixel (70%) • Stripixel (10%) • Power (50%) • Rack Allocation and Cable Plan • In progress (80%) • Design and Safety Reviews • In progress (60%) • DCM-2 Interface • In progress (40%)

  4. Eric J. Mannel mannel@nevis.columbia.edu System Chain Tests • FNAL T-984(E.J. Mannel Spokesperson) • Conducted at the FNAL M-Test Beam Facility August 17-28, 2008 • 120 GeV proton beam, ~ 4kHz • 3 Pixel ½ ladders with PHENIX DAQ System (Full chain test with pixel system) • 3 Stripixel sensor modules with stand-alone readout system • Data collection over ~5 days

  5. Eric J. Mannel mannel@nevis.columbia.edu System Chain Tests • Results reported by A. Taketani (pixel) and R. Nouicer (stripixel) • Successfully ran both systems in close proximity to each other. • Measured: • Noise rates (pixel) • Signal:Noise ratios (stripixel) • Efficiencies (pixels/stripixels) • Charge sharing • Tests were successfully completed.

  6. Eric J. Mannel mannel@nevis.columbia.edu Power and Ground Plan • Common plan for both the VTX and FVTX systems. • V1 plan completed and documented on VTX/FVTX Twiki • V2 plan is under developement. • Plan Highlights: • VTX and FVTX isolated from each other and other PHENIX systems • Star ground plan • Single point connection to PHENIX clean ground • Flexibility in location of ground connections

  7. Eric J. Mannel mannel@nevis.columbia.edu Power and Ground Plan • Plan Highlights Continued: • Shielding around beam pipe • Exterior shielding around VTX/FVTX enclosure • Optional interior shielding between subsystems • Optical connections to Rack Room/DAQ • Independent floating bias supplies • Segregated common supplies for low voltage

  8. Eric J. Mannel mannel@nevis.columbia.edu Magnet Bridge Floating Returns Pixel Subsystem Pixel Power VTX/FVTX Global Power and Ground Plane StriPixel Subsystem StriPixel Power FVTX North FVTX N Power FVTX South FVTX S Power Safety Ground Beam Pipe Shield Rack Room PIXEL FEMs StripPixel FEMs Space Frame Fiber Optic FVTX FEMs PHENIX Clean Ground Power and Ground

  9. Eric J. Mannel mannel@nevis.columbia.edu Low Voltage Power • Use new PHENIX Standard Low Voltage System • Based on Vicor MegPak modules • Distribution Modules: • 10 channels common voltage/return • Up to 10 Amps/channel • Individual channel Switching • Voltage and current monitoring • Design completed, testing in progress

  10. Eric J. Mannel mannel@nevis.columbia.edu Pixel Module 3.5V-4A per channel Pixel Bus 1 SPIRO 1 Pixel Bus 2 SPIRO 2 Pixel Bus 3 SPIRO 3 Pixel Bus 4 SPIRO Module 5V-4A per channel SPIRO 4 Pixel Bus 5 SPIRO 5 Pixel Low Voltage Distribution

  11. Eric J. Mannel mannel@nevis.columbia.edu PHENIX Low Voltage Module • Design is complete • Boards available for evaluation and testing • Evaluation crate being installed in Chemistry lab • Will test with stripixel system in June

  12. Eric J. Mannel mannel@nevis.columbia.edu Bias Supply • Bias supply from Wiener/ISEG selected • Single channel floating bias supplies • Pixel 0-50V (60 channels) • Stripixel 0-250V (40 channels) • Separate crates for pixel and stripixel systems • Performance testing done Mar-May 2008 @ SBU • Integration testing done July-Aug 2008 • Integration testing by A. Hulsebus (ISU) and PHENIX ONCS group • Comment from PHENIX ONCS group- • “System easily integrated into PHENIX”

  13. Wiener/ISEG System • Control module SNMP, tested under LINUX and fully functional. • 16 channels per module • 4 modules per crate. • 2 crates required for VTX • 7 modules (4 pixel, 3 stripixel required Eric J. Mannel mannel@nevis.columbia.edu

  14. Eric J. Mannel mannel@nevis.columbia.edu Wiener/ISEG System • System tested • Valid quote in hand • 12 week delivery • Reviewing quote • Anticipate PO will be issued in June 2009 • System available for ladder testing Fall 2009

  15. Eric J. Mannel mannel@nevis.columbia.edu Slow Control • Discussions with PHENIX ONCS group (M. Purschke, E. Desmond) • First meeting in Sept 2007 • Discussion of overall design • Pixel Requirements • Pixel slow control • N. Apadula (SBU) primary programmer • Developing code for PHENIX On-line • 70% complete

  16. Eric J. Mannel mannel@nevis.columbia.edu Slow Control • Stripixel Slow Control • Standalone sytem working: A. Dion (ISU), A. Enokizono (ORNL) • Discussions with PHENIXS ONCS group Mar 2009 • Starting work on system to interface with PHENIX On-line system (A. Dion, A. Enokizono)

  17. Eric J. Mannel mannel@nevis.columbia.edu Slow Control • Bias Voltage • Bias Voltage evaluation system in summer of 2008, C. Pancake (SBU) • Control routines for system developed June-Aug 2008, A. Hulsebus (ISU) • GUI development, Summer 2009, A. Hulsebus (ISU) • Low Voltage • Interface routines exist • GUI development, Summer 2009, A. Hulsebus (ISU)

  18. Eric J. Mannel mannel@nevis.columbia.edu Rack Allocation and Cabling • Done in conjunction with other upgrades • Magnet bridge- power supplies • Rack room- FEMs/DCMs • Sufficient space is` available for all systems • Cable routing is being developed (June 09)

  19. Eric J. Mannel mannel@nevis.columbia.edu Design and Safety Reviews • Continuing to have regular design reviews • July 2007 ROC-2 Review • Sept 2007 SPIRO preproduction review • Nov 2007 SPIRO preproduction review-2 • Dec 2007 PIXEL Bus preproduction review • Dec 2007 PIXEL Bus extender preproduction review • ROC-3 Performance review, Oct 2008 • Pixel FEM production review, Dec 2008

  20. Eric J. Mannel mannel@nevis.columbia.edu Design and Safety Reviews • Pending review • Combined VTX/FVTX Mechanical/Electrical Safety review June 11, 2009 • Stripixel Readout review, planning in progress, June 2009. • Stripixel production reviews- RCC, LDTB, DIB/CIB Fall 2009 • Final Safety Review- TBD

  21. Eric J. Mannel mannel@nevis.columbia.edu DCM-2 • Interface between FEMs and PHENIX DAQ • Consists of: • Crate Controller Module • DCM-2 module: 8 Fiber channels/module • JSEB-2: Interface to Eventbuilder • DCM-2 • 8/10 bit encoding, 1.6 Gbps. • Optical interface complete. • Implemented as daughter board. • Available for testing FEM interface • DCM-2 R&D is off-project

  22. Eric J. Mannel mannel@nevis.columbia.edu DCM-2 • Optical interface implemented as FE-2 daughter board, and used in FNAL T-984 test beam, Aug 2008 • JSEB-2 Prototype complete • Prototype layout of DCM-2, Controller and backplane nearing completion • Prototype Fab: July-August 2009 • Testing Start: Sept 2009 • Production Fab Start: Dec-2009

  23. Eric J. Mannel mannel@nevis.columbia.edu Electronics Integration Tasks • System Testing • FNAL chain test complete • Power and Grounding • V1 plan complete • V2 plan in progress (75%) • Power systems- • Evaluation • Bias (100%) • Low Voltage (40%) • Purchasing (10%)

  24. Eric J. Mannel mannel@nevis.columbia.edu Electronics Integration Tasks • Slow Control • Pixel (70%) • Stripixel (10%) • Power (50%) • Rack Allocation and Cable Plan • In progress (80%) • Design and Safety Reviews • In progress (60%) • DCM-2 Interface • In progress (40%) • Does not impact FEM development

More Related