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Design of Large ICs (5kk53)

Design of Large ICs (5kk53). Jef van Meerbergen Patrick Groeneveld Gerard de Haan Henk Corporaal slides and course info available via www.ics.ele.tue.nl/~jef. Goal = learn about. design of complex digital systems in silicon different steps executable specification of an algorithm

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Design of Large ICs (5kk53)

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  1. Design of Large ICs (5kk53) Jef van Meerbergen Patrick Groeneveld Gerard de Haan Henk Corporaal slides and course info available via www.ics.ele.tue.nl/~jef jvm

  2. Goal = learn about • design of complex digital systems in silicon • different steps • executable specification of an algorithm • architecture exploration (from C/C++ to RTL) • implementation (from RTL to ASIC or FPGA) • cooperation in design teams • multi-disciplinary cooperation • important and less important aspects By simulating a real-life design process jvm

  3. 2 2 Application: image compression You have to put a new JPEG system in the market by end Q2 2004. JPEG encoder JPEG decoder bmp .jpg quality More info from Gerard jvm

  4. Customer requirements • Correct • Robust • Flexible (late spec changes) • High quality images • Low cost • fast jvm

  5. Available documentation • application • next presentation • C description • additional reading material JPEG: jpeg_bitstream.ppt, Slides1-5.doc • tools & architectures from previous courses • SiliconHive /home/hive • FPGA hw+sw jvm

  6. 3 phases • Mapping JPEG on a given MP architecture (bus based) • Mapping on FPGA (NoC based) • Develop your own architecture jvm

  7. 1. Mapping JPEG on a given MP Simulation in SystemC BasicMI core BasicMI core BasicMI core Host PC memory • BasicMI • 1 Logic slot + 1 DSP slot + 1 Master DTL interface + 1 Slave DTL interface jvm

  8. Steps/flow Algorithm design Executable spec Optimisation & partitioning optimized spec Part 1 Part 2 Part n Inter- faces VHDL/Verilog Magma FPGA jvm

  9. Roles: examples • Project leader • Architect • Algorithm designer • Core designer • Hardware, software • Expert (SiHive, FPGA) • … jvm

  10. Steps/milestones • Kick-off meeting: define strategy and roles • Algorithm design and executable spec • Architecture • Implementation • presentation Weekly meetings (20 min) with the customer to monitor progress jvm

  11. Kick-off meeting • Risk reduction • What are the uncertainties ? • How to work in parallel ? • Who plays which role ? jvm

  12. Extra jvm

  13. Steps/flow C C optimized profile C partitioned HW parts ASIPs SW parts synthesize Compile/ synthesize compile jvm

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