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Memory Management

Memory Management. 计算机学院 李征 Tel : 13882153765 Email : lizheng@cs.scu.edu.cn OICQ: 1340915. (1) Segment Management. Inside CPU, logic address is used; physic address is used on system bus. To CPU or program, memory is composed of several segments.

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Memory Management

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  1. Memory Management 计算机学院 李征 Tel:13882153765 Email:lizheng@cs.scu.edu.cn OICQ: 1340915

  2. (1) Segment Management • Inside CPU, logic address is used; physic address is used on system bus. • To CPU or program, memory is composed of several segments. • There are only 4 current segments which can be operated.

  3. (1) Segment Management • For 8086/8088, the addressing range of memory is 1M bytes. • How many segments can be there in maximum? • How about the maximal length of a single segment?

  4. (2) Storage order – Converse Storage • Converse Storage: Lower address for lower bits, and higher address for higher bits. • It is a tradition of Intel, not for all CPUs.

  5. (2) Storage order – Converse Storage • Example: • MOV DS:[0002H], 1234H • ; (DS) = 1000H • How is this data be stored?

  6. (2) Storage order – Converse Storage 10000H (DS)=1000H 10001H 10002H 34H EA=0002H 12H 10003H 10004H 10005H 10006H

  7. (3) Stack Segment • Functions of Stack Segment: • 1) Preserve return point (address) of procedure • 2) Preserve break point (address) of interrupt routine • 3) Preserve CPU execution scene

  8. 1) Preserve return point (address) of procedure • In calling program • … • … • CALL PROC1 • … • … • Where does IP point when this ‘CALL’ instruction is executed ?

  9. 1) Preserve return point (address) of procedure • How is ‘CALL’ instruction executed? • Just one case, not all: • SP <= (SP)-2 • (SP) <= (IP) • IP <= PROC1

  10. 1) Preserve return point (address) of procedure • In called procedure: • … • … • RET • The final instruction executed in procedure must be a ‘RET’.

  11. 1) Preserve return point (address) of procedure • How is ‘RET’ instruction executed? • Just one case, not all: • IP <= ((SP)) • SP <= (SP)+2 • When ‘RET’ is executed, procedure must ensure the stack top is return point.

  12. 1) Preserve return point (address) of procedure • Why return point must be stored as stack structure? • Why not other structures? • The calling and returning follow the LIFO rule.

  13. 2) Preserve break point (address) of interrupt routine • When CPU accept an interrupt, the following operation is executed: • SP <= (SP)-2 • (SP) <= FR • SP <= (SP)-2 • (SP) <= CS • SP <= (SP)-2 • (SP) <=IP • Why FR is also preserved?

  14. 2) Preserve break point (address) of interrupt routine • In interrupt routine: • … • … • IRET • The final instruction executed in procedure must be a ‘IRET’.

  15. 2) Preserve break point (address) of interrupt routine • How is ‘IRET’ instruction executed? • IP <= ((SP)) • SP <= (SP)+2 • CS <=((SP)) • SP <= (SP)+2 • FR <= ((SP)) • SP <= (SP)+2 • When ‘IRET’ is executed, interrupt routine must ensure the stack top is a break point.

  16. 2) Preserve break point (address) of interrupt routine • Why break point is also preserved in stack structure? • Because the interrupt routine might be interrupted again.

  17. 3) Preserve CPU execution scene • CPU execution scene: The status of all registers and flags. • When procedure is executed, it may use registers or flags. • This might introduce logic error in calling program.

  18. 3) Preserve CPU execution scene • Then, the CPU execution scene must be preserved in procedure. (Why not in calling program?) • ;Example: • PUSH AX • PUSH BX • PUSHF • … ;AX, BX, and FLAGS modified here • POPF • POP BX • POP AX • RET

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