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Binary Addition Binary Multiplication

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### Binary AdditionBinary Multiplication

Section 4.5 and 4.7

Topics

- Calculations Examples
- Signed Binary Number
- Unsigned Binary Number

- Hardware Implementation
- Overflow Condition
- Multiplication

Unsigned Number

(2-bit example)

Unsigned Addition

- 1+2=

Summary for Unsigned Addition/Subtraction

- Overflow can be an issue in unsigned addition
- Unsigned Subtraction (M-N)
- If M≥N, and end carry will be produced. The end carry is discarded.
- If M<N,
- Take the 2’s complement of the sum
- Place a negative sign in front

Signed Binary Numbers

- 4-bit binary number
- 1 bit is used as a signed bit
- -8 to +7
- 2’s complement

Signed Addition (70+80)

(Indicates a negative number)

70=21+22+26=2+4+64

80=24+26=16+64

10010110→01101001 →01101010

21+23+25+26=2+8+32+64=106

10010110↔-106

010010110

010010110↔ 21+22+24+27=2+4+16+128=150

Conclusion: There is a problem of overflow

Fix: Use the end carry as the sign bit, and let b7 be

the extra bit.

Signed Subtraction (70-80)

(Indicates a negative number)

70=21+22+26=2+4+64

80=24+26=16+64

11110110→00001001 →00001010

21+23=10

11110110↔-10

(No Problem)

Signed Subtraction (-70-80)

(Indicates a positive number! A negative number expected.)

70=21+22+26=2+4+64

80=24+26=16+64

101101010 →010010101 → 010010110

010010110 ↔21+22+24+27=2+4+16+128=150

101101010 ↔-150

Conclusion: There is a problem of overflow

Fix: Use the end carry as the sign bit, and let b7 be

the extra bit.

Observations

- Given the similarity between addition and subtraction, same hardware can be used.
- Overflow is an issue that needs to be addressed in the hardware implementation
- A signed number is not processed any different from an unsigned number. The programmer must interpret the results of addition and subtraction appropriately.

Four-Bit Adder-Subtractor

Detect Overflow in Signed Addition

Observe

The cary into the sign bit

The carry out of the sign bit

If they are not equal,

they indicate an overflow.

Use an AND gate to multiply A0 and B0

Four-bit by three-bit Binary Multiplier

S10=A0B1+A1B0

S11=A0B2+A1B1+C1

S12=A0B3+A1B2+C2

S13=0+A1B3+C3

(S1X, where 1 is the first 4-bit adder)

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