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ECET 581

ECET 581. Wireless Sensor Networks Mote – MCU & Sensor Hardware 1 of 3 Fall 2006 http://www.etcs.ipfw.edu/~lin. WSN Mote & Sensor Hardware. Computing Platform Architecture Processor Architecture Software Architecture Distributed Computing Hardware/Software Codependencies

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ECET 581

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  1. ECET 581 Wireless Sensor Networks Mote – MCU & Sensor Hardware 1 of 3 Fall 2006 http://www.etcs.ipfw.edu/~lin WSN Mote- MCU & Sensor Hardware

  2. WSN Mote & Sensor Hardware • Computing Platform Architecture • Processor Architecture • Software Architecture • Distributed Computing • Hardware/Software Codependencies • ADC and Sensors Interfaces WSN Mote- MCU & Sensor Hardware

  3. Computing Platform Architecture • The Instruction Set Architecture (ISA) • Lowest-level of abstraction • Providing access to processor instructions • Data transfer: CPU ↔ Registers • Machine Architecture • System communication buses • Memory elements • Peripheral components • Machine Implementation • Logic gates • Transistors WSN Mote- MCU & Sensor Hardware

  4. Computing Platform Architecture • Design Principles • Hierarchy of Layers • Separating implementation from interface • Influenced by designs of • Various computer systems: Mainframe computers, Mini computers, Microcomputers, Microcontrollers • Advancement in physical implementation capabilities • Vacuum tube, semiconductors, processes • Moore’s Law – empirical observation in 1965 by Gordon E. Moore that the number of transistors on an IC for the minimum component cost, double every 24 months WSN Mote- MCU & Sensor Hardware

  5. Major Abstraction Layers – A Computer System • Users - Interfaces • Applications – System call interfaces • Programming Languages • Compilers • Assemblers • Process Instructions Sets • Processor Data Paths • Logic Blocks • Logic Gates • Transistors • Semiconductor Systems WSN Mote- MCU & Sensor Hardware

  6. User User Interface Application System Call Interface Operating System Instruction Set Arch. Processor Bus Interface Memory, Peripherals Abstraction Layers – Operation View WSN Mote- MCU & Sensor Hardware

  7. Processor Architecture • Control Unit • Combinational Unit • ALU • Comparators • Shifters • Storage Elements • CPU registers • Operations • Instruction fetch • Instruction decode • Operand fetch • Instruction executions • Storage WSN Mote- MCU & Sensor Hardware

  8. TI MSP430161x Mixed Signal MCU WSN Mote- MCU & Sensor Hardware

  9. TI MSP430161x Mixed Signal RISC MCU Functional Blocks WSN Mote- MCU & Sensor Hardware

  10. TI MSP430161x Registers • RISC Architecture • 27 core instructions • 24 emulated instructions • 7 addressing modes • Constant generator • Buses: • 16-bit Memory Data Bus • 16-bit Mem. Addr Bus • 16-bit Gen. Purpose Reg: R0-R15 • Single-cycle register operations • Memory-to-memory atomic addressing • Bit, byte, and word procesisng WSN Mote- MCU & Sensor Hardware

  11. MSP 430 Memory Map • Flash Memory • (x) 512 byte memory segments • 4KB – 8 mem. seg • Flash In-System Programming Methods • Self programming – normal software • JTAG – out/in-system • Bootstrap Loader (BSL) • Data storage • Flash Control Registers WSN Mote- MCU & Sensor Hardware

  12. Operating Modes • Active Mode (AM) • All clocks are active • Low-Power Mode 0 (LPM0) • CPU – disabled • Subsystem clock (SMCLK) and Auxiliary Clock (ACLK) - active; Main system clock (MCLK) - disabled • Low-Power Mode 1 (LPM1) • CPU disabled • ACLK, SMLK active; SMCLK disabled • Low-Power Mode 2 (LPM2) • CPU disabled • MCLK and SMCLK – disabled, ACLK - active • Low-Power Mode 3 (LPM3) • CPU disabled • MCLK and SMCLK disabled, ACLK - active • Low-Power Mode 4 (LPM4) • CPU disabled • ACLK, MCLK, SMCLK - disabled WSN Mote- MCU & Sensor Hardware

  13. MSPF2xx Enhanced Clock System • Very Low-Power • Oscillator (VLO) • Digitally Controlled • Oscillator (DCO) WSN Mote- MCU & Sensor Hardware

  14. TI MSP430161x ADC WSN Mote- MCU & Sensor Hardware

  15. TI MSP430F20x2 Flexible ADC10 • 10-bit ADC • 200ksps+ • Autoscan: A3-A2-A1-A0 • Single sequence, Repeat-single, Repeat-sequence • Int/ext ref • TA SOC (Start of Conversion) triggers – Timer-A (Timer/Counter with 3 capture/compare registers) • Direct Transfer Controller (DTC) WSN Mote- MCU & Sensor Hardware

  16. USI Fast Synchronous Data Transfer • SPI Mode • 8/16-bit shift register • MSB/LSB first • I2 Mode Support • START/STOP detection • Arbitration lost detection • Interrupt Driven • Reduces CPU Load WSN Mote- MCU & Sensor Hardware

  17. USI Fast Synchronous Data Transfer WSN Mote- MCU & Sensor Hardware

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