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A New Tool for Designer-Level Verification: From Concept to Reality

A New Tool for Designer-Level Verification: From Concept to Reality. April 30, 2014. Ziv Nevo IBM Haifa Research Lab. Overview. Designer-level verification (DLV) DLV tools: historical perspective at IBM Our latest recipe. Designer-level verification (DLV). Life without DLV. RTL. spec

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A New Tool for Designer-Level Verification: From Concept to Reality

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  1. A New Tool forDesigner-Level Verification: From Concept to Reality April 30, 2014 Ziv Nevo IBM Haifa Research Lab

  2. Overview Designer-level verification (DLV) DLV tools: historical perspective at IBM Our latest recipe

  3. Designer-level verification (DLV)

  4. Life without DLV RTL spec ---------- spec ---------- Verification engineer Logic designer

  5. Weeks later… fail trace spec ---------- spec ---------- Verification engineer Logic designer

  6. DLV ≈ “Developer testing”(standard practice in SW) RTL Verification engineer Logic designer Basic checks

  7. What activities does DLV include? Debugging Lightweight verification Observation Checking assertions and coverage points Bug hunting Exploring corner cases Observing mainstream behavior

  8. Verification: tools of the trade Simulator Testbench HVL Methodology Scripts Formal Assertions Coverage … Verification engineer Logic designer

  9. DLV: what should the tools be? • Simulator • Testbench • HVL • Methodology • Scripts • Formal • Assertions • Coverage • … Logic designer

  10. DLV tools: historical perspective at IBM

  11. Idea 1: TIMEDIAG (1997) Specify input value/function/random Loop cycle (count/random/condition)

  12. Idea 1: TIMEDIAG (1997) GenRand • Random instantiation • Simulation • Checking

  13. TIMEDIAG ingredients What’s missing? • Interactive define/run/view • Event-guided test cases • Formal analysis Waveform-based interface simulation complex interleavings

  14. What activities does DLV include? Debugging Lightweight verification Observation Checking assertions and coverage points Bug hunting Exploring corner cases Observing mainstream behavior

  15. Idea 2: PathFinder (2002) Find a trace(formal analysis) View trace Define events

  16. Idea 2: PathFinder (2002) Main flow: • Specify events • Find trace • View trace Minor feature: • Edit inputs on waveform • Simulate

  17. PathFinder ingredients waveform-based interface simulation What’s missing? • Simple driving(default is random) • Fast simulation • Integration with common tools Event-guided test cases Formal analysis Interactive define/run/view

  18. What activities does DLV include? Debugging Lightweight verification Observation Checking assertions and coverage points Bug hunting Exploring corner cases Observing mainstream behavior

  19. Another DLV tool

  20. Jasper Visualize

  21. Our latest recipe

  22. Latest recipe: Diver Main flow Specify inputs Specify expected results scenario editor Simulate View trace View unexpected results IBM Debug and Verification Tool for Designers (DIVER)

  23. Latest recipe: Diver Additional variations Simulate or run formal engine Repetitions and delays Assertions and coverage Specify events on outputs Run-to-failure

  24. Debugging Trace from simulation of integrated component Scenario for designer-level component Importtrace

  25. Diver ingredients Waveform-based interface Formal analysis Interactive define/run/view Event-guided test cases Climate for DLV simulation

  26. What activities does DLV include? Debugging Lightweight verification Observation Checking assertions and coverage points Bug hunting Exploring corner cases Observing mainstream behavior

  27. Conclusions DLV activity should scale linearly with the amount of effort spent Recommended recipe: • Waveform-based interface • Interactive define/run/view • Integration with common tools • Driving inputs • Simulation • Event-based test cases • A touch of formal analysis

  28. Questions?

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