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Power Supply Systems. Electrical Energy Conversion and Power Systems . Universidad de Oviedo. Power Electronic Devices. Semester 1 . Lecturer: Javier Sebastián. Research Group Power supply Systems (Sistemas Electrónicos de Alimentación).

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Power electronic devices

Power Supply Systems

Electrical Energy Conversion and Power Systems

Universidad

de Oviedo

Power Electronic Devices

Semester 1

Lecturer: Javier Sebastián


Power electronic devices

Research Group

Power supply Systems

(Sistemas Electrónicos de Alimentación)

Javier Sebastián Dr. Electrical Engineer (Ingeniero Industrial)Full professor

Room 3.1.21Edificio nº 3, Campus Universitario de Viesques 33204 Gijón (Asturias). SpainPhone (direct): 985 18 20 85 Phone (secretary): 985 18 20 87Fax: 985 18 21 38

E-mail: [email protected]

Web: http://www.unioviedo.es/sebas/


Outline

Outline

  • Review of the physical principles of operation of semiconductor devices.

  • Thermal management in power semiconductor devices.

  • Power diodes.

  • Power MOSFETs.

  • The IGBT.

  • High-power, low-frequency semiconductor devices (thyristors).


Outline1

D

G

S

Outline

Review of physical principles of semiconductors

Power electronics devices


Previous requirements

Previous requirements

  • Basic electromagnetic theory.

  • Basic circuit theory.

  • The operation of basic electronics devices in circuits. The student must understand the behaviour of the following electronics devices in simple circuits:

  • Diodes.

  • Bipolar Junction Transistors, both PNP and NPN types.

  • Field Effect Transistor, especially enhancement-mode Metal-Oxide-Semiconductor Field Effect Transistors (MOSFETs), both in N-channel- and P-channel types.


Lesson 1 review of the physical principles of operation of semiconductor devices

Electrical Energy Conversion and Power Systems

Universidad

de Oviedo

Lesson 1 - Review of the physical principles of operation of semiconductor devices

Semester 1 - Power Electronics Devices


Outline2

Outline

  • Review of the physical principles of operation of semiconductor devices:

    • Basic concepts about semiconductor materials: band diagrams, intrinsic and extrinsic semiconductors, mechanisms for electric current conduction and continuity equation and its use in simple steady-state and transient situations.

    • Basic concepts about PN junctions: Equilibrium conditions, forward- and reverse-biased operation and calculation of the current flow when biased.

    • Reverse-biased voltage limits of PN junctions.

    • PIN junctions.

    • Conductivity modulation.

    • Transient effects in PN junctions in switching-mode operation.

    • Metal-semiconductor junctions.


Energy level in a semiconductor as a function of inter atomic spacing

Energy level in a semiconductor as a function of inter-atomic spacing

At 0 K, empty

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-

Energy of electrons

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-

-

Inter-atomic spacing

At 0 K, filled

Actual spacing


Concept of band diagram

Energy of electrons

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-

-

-

Concept of band diagram

Empty at 0 K

4 states/atom

Conduction band

Eg

Band gap

Valence band

4 electrons/atom

Filled at 0 K


Band structure for insulators semiconductors and metals at 0 k

Band structure for insulators, semiconductors and metals at 0 K

Conduction band

Conduction band

Conduction band

Band gap Eg

Band gap Eg

Overlap

Valence band

Valence band

Valence band

Semiconductor

Eg=0.5-2 eV

Insulator

Eg= 5-10 eV

Metals

No Eg


Band structure for semiconductors at room temperature concept of hole

Si

Si

Si

Si

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-

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-

-

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-

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+

-

-

-

-

Band structure for semiconductors at room temperature. Concept of “hole”

Conduction band

Eg

Valence band

+

Semiconductor

Eg=0.5-2 eV

Visualizationusingthebondingmodel

  • Someelectronsjumpfromthevalence band totheconduction band. They are chargecarriersbecausethey can movefromoneatomtoanother.

  • Theemptystate in thevalence band isreferredto as a “hole”.

  • Theholeshave positive charge. They are alsochargecarriers.


Power electronic devices

Si

Si

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Concepts of generation and recombination

Recombination

Generation

Si

Si

Eg

Eg

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-

Si

Si

Si

Si

+

+

-

-

-

-

+

+

12


Why both holes and electrons are electric charge carriers

-------

Si

Si

Si

Si

Si

Si

Si

Si

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+ + + + + + +

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Why both holes and electrons are electric charge carriers?

  • In general, there will be electric current due to both electrons and holes

  • Example: when there is an electric field in the semiconductor lattice

-


How many electrons and holes are there in 1 cm 3

How many electrons and holes are there in 1 cm3?

  • The number of these electrons and holes strongly depend on both Eg and the room temperature. It is called intrinsic concentration and it is represented as “ni”.

  • The concentration of electrons in the conduction band (negative charge carriers) is represented as “n”. The concentration of holes in the valence band (positive charge carriers) is represented as “p”.

  • Obviously n = p = ni in this type of semiconductors (intrinsic semiconductors)

  • Some examples of the value of ni at room temperature:

Taking into account the number of bonds of valence band electrons in 1cm3 of silicon, only one bond is broken for each amount of 1013 unbroken bonds (at room temperature)


Concept of extrinsic semiconductors doping semiconductor materials

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-

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Sb

Al

Concept of extrinsic semiconductors: doping semiconductor materials

  • Can we have different concentration of electrons and holes?

  • The answer is yes. We need to introduce “special” impurities into the crystal:

  • Donors: atoms from column V of the Periodic Table. We obtain an extra electron for each atom of donor.

  • Acceptors: atoms from column III of the Periodic Table. We obtain an extra hole for each atom of acceptor.

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-

Si

Si

-

Si

Si

-

+

1

Donor

1

5

2

2

-

Si

Si

-

-

+

Acceptor

4

-

3

-

3


N type and p type semiconductors

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-

-

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-

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5

Al-

Sb+

N-type and P-type semiconductors

-

-

Si

-

Si

Si

-

Si

  • N-type semiconductor:

  • Majority carriers are electrons.

  • Minority carriers are holes.

  • Positively-charged atoms of donor (positive ions).

  • P-type semiconductor:

  • Majority carriers are holes.

  • Minority carriers are electrons.

  • Negatively-charged atoms of acceptor (negative ions).

+

1

Donor

1

2

2

Si

-

Si

-

Acceptor

4

-

-

3

3


Charges in n type and p type semiconductors

Al-

Al-

Al-

Al-

Al-

Thermalgeneration

Al-

Al-

Al-

Al-

Al-

-

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+

+

+

Thermalgeneration

Sb+

Sb+

Sb+

Sb+

Sb+

Sb+

Sb+

Sb+

Sb+

Sb+

Charges in N-type and P-type semiconductors

P-typesilicon

Acceptorions (negativeions)

hole

electron

Donorions(positive ions)

N-typesilicon


Charge carries in n type and p type semiconductors

Al-

Al-

Al-

Al-

Al-

Al-

-

-

-

-

-

-

-

-

+

+

+

+

+

+

+

+

Sb+

Sb+

Sb+

Sb+

Sb+

Sb+

Charge carries in N-type and P-type semiconductors

  • Concentration of majority carriers: pP

  • Concentration of minority carriers: nP

  • Mass action law: pP·nP =ni2

  • (only valid at equilibrium)

P-type

  • Concentration of majority carriers: nN

  • Concentration of minority carriers: pN

  • Mass action law: nN·pN =ni2

  • (only valid at equilibrium)

Very important equations!!!

N-type


Static charges in n type and p type semiconductors

Al-

Al-

Al-

Al-

Al-

Al-

-

-

-

-

-

-

-

-

+

+

+

+

+

+

+

+

Sb+

Sb+

Sb+

Sb+

Sb+

Sb+

Static charges in N-type and P-type semiconductors

  • Concentration of acceptors: NA

  • (only negative static charges in a P-type semiconductor)

P-type

  • Concentration of donors: ND

  • (only positive static charges in a N-type semiconductor)

N-type


Neutrality in n type and p type semiconductors

Al-

Al-

Al-

Al-

Al-

Al-

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-

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+

+

+

+

+

+

+

+

Sb+

Sb+

Sb+

Sb+

Sb+

Sb+

Neutrality in N-type and P-type semiconductors

  • Silicon, aluminium and antimony were neutral before being used Þ The extrinsic semiconductor must be neutral, too.

  • Positive charges in volume V: pP·V

  • Negative charges in volume V: nP·V + NA·V

  • Neutrality: pP = nP + NA

P-type

  • Negative charges in volume V: nN·V

  • Positive charges in volume V: pN·V + ND·V

  • Neutrality: nN = pN + ND

Very important equations!!!

N-type


Calculating the concentration of electrons and holes i

Al-

Al-

Al-

Al-

Al-

Al-

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+

+

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Sb+

Sb+

Sb+

Sb+

Sb+

Sb+

Calculating the concentration of electrons and holes (I)

  • Neutrality: pP = nP + NA

  • Mass action law: pP·nP =ni2

  • 2 known (NA and ni) and 2 unkown (pP and nP) variables Þ can be solved

P-type

  • Neutrality: nN = pN + ND

  • Mass action law: nN·pN =ni2

  • 2 known (ND and ni) and 2 unkown (nN and pN) variables Þ can be solved

N-type


Calculating the concentration of electrons and holes ii

Al-

Al-

Al-

Al-

Al-

Al-

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+

+

+

+

+

+

+

+

Sb+

Sb+

Sb+

Sb+

Sb+

Sb+

Calculating the concentration of electrons and holes (II)

  • Frequent case: quite heavy doped semiconductors

  • NA >> ni

  • Neutrality: pP» NA

  • Mass action law: nP»ni2/NA

P-type

  • ND >> ni

  • Neutrality: nN» ND

  • Mass action law: pN»ni2/ND

Very useful equations!!!

N-type


Mechanisms to conduct electric current drift i

jn

E

jp

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+

Mechanisms to conduct electric current: Drift (I)

  • Semiconductors can conduct electric current due to the presence of an electric field E

- - - - -

+ + + + +

  • jp_Drift = q·p·p·Eis the current density of holes due to drift.

  • jn_Drift = q·n·n·E is the current density of electrons due to drift.


Mechanisms to conduct electric current drift ii

Mechanisms to conduct electric current: Drift (II)

q = magnitude of the electronic charge (1.6·10-19 coulombs).

p = hole mobility.

n = electron mobility.

p = hole concentration.

n = electron concentration.

E = electric field.

  • jp_Drift = q·p·p·E

  • jn_Drift = q·n·n·E


Mechanisms to conduct electric current diffusion i

jn_Diff

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1

2

n2 < n1

n1

Mechanisms to conduct electric current: Diffusion (I)

Electrons have migrated due to “diffusion” (you can see the same phenomenon in gases)


Mechanisms to conduct electric current diffusion ii

jn_Diff

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1

2

n2 < n1

n1

n

Mechanisms to conduct electric current: Diffusion (II)

  • If we maintain a different concentration of electrons, we also maintain the motion of electrons in the lattice


Mechanisms to conduct electric current diffusion iii

jn_Diff

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1

2

n2 < n1

n1

n

Mechanisms to conduct electric current: Diffusion (III)

The current density is proportional to the electron concentration gradient:

jn_Diff = q·Dn· n



Dn = electron diffusion coefficient.


Mechanisms to conduct electric current diffusion iv

jp_Diff

+

+

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1

2

p2 < p1

p1

p

Mechanisms to conduct electric current: Diffusion (IV)

The current density is proportional to the hole concentration gradient:

jp_Diff = -q·Dp· p



Dp = hole diffusion coefficient.


Mechanisms to conduct electric current diffusion v

Mechanisms to conduct electric current: Diffusion (V)

q = magnitude of the electronic charge (1.6·10-19 coulombs).

Dp = hole diffusion coefficient.

Dn = electron diffusion coefficient.

Ñp = hole concentration gradient.

Ñn = electron concentration gradient.

jp_Diff= -q·Dp· p

jn_Diff= q·Dn· n






Summary of conduction mechanisms

Summary of conduction mechanisms

  • Drift currents depend on the carrier concentration and on the electric field.

  • Diffusion currents do not depend on the carrier concentration, but on the carrier concentration gradient.

  • jp_Drift = q·p·p·E

  • jn_Drift = q·n·n·E

jp_Diff = -q·Dp· p

jn_Diff = q·Dn· n






Continuity equations i

A

B

Continuity equations (I)

There are some relationships between spatial and time variations of carrier concentrations because electrons and holes cannot mysteriously appear and disappear at a given point, but must be transported to or created at the given point via some type of ongoing action.

  • The concentration of holes can be time-changing due to:

  • Different current density of holes across “A” and “B”.

  • Excess of carriers over the equilibrium (mass action law).

  • Generation of electron-hole pairs by radiation (light) .


Continuity equations ii

-

-

-

Light

-

A

A

A

B

B

B

+

+

+

+

+

+

Continuity equations (II)

jn_B

  • Different current density of holes across “A” and “B”.

jp_B

jp_A

  • Excess of carriers over the equilibrium (mass action law).

  • Generation of electron-hole pairs by radiation (light) .


Power electronic devices

·jp/q

p/t = GL- [p(t)-p]/p

 -

·jn/q

 +

n/t = GL- [n(t)-n]/n

Continuity equations (III)

Taking into account the three effects, we obtain the continuity equation for holes:

Variation due to the excess of carriers over the equilibrium

Total time variation of holes

Variation due to the generation of electron-hole pairs by light

Variation due to the different current density of holes across “A” and “B”

GL: rate of generation of electron-hole pairs by light.

tp: hole minority-carrier lifetime.

p: hole concentration in steady-state.

Similarly, we can obtain the continuity equation for electrons:


Power electronic devices

·jp/q

p/t = GL- [p(t)-p]/p

 -

N

+

+

+

+

+

+

+

+

+

+

+

+

+

+

+

+

+

+

+

+

+

+

+

+

+

+

+

+

+

+

+

Time evolution of an “excess” of minority carries (I)

  • We generate an “excess” of electron-hole pairs by injecting light into a piece of N-type silicon and we reach the steady-state.

Þ p0= GL·p + p

0

0

p

p0

N

  • Now the light injected disappears. We want to compute the time evolution of the hole concentration afterwards.

N

p0

p(t)

p


Power electronic devices

Tangent line

p0

Samearea

·jp/q

p/t = GL- [p(t)-p]/p

 -

p(t)

p

p

t

p

Time evolution of an “excess” of minority carries (II)

  • We can also compute the time evolution of the hole concentration from the continuity equation:

0

0

After integrating Þp(t) = p+(p-p)·e-tp

  • Physical interpretation: There is an appreciable increase of holes during 3-5 times tp.


Power electronic devices

N

·jp/q

p/t = GL- [p(t, x)-p]/p

 -

xN

x

+

+

+

+

+

+

+

+

+

+

+

+

+

+

+

+

+

+

Spatial evolution of an “excess” of minority carries (I)

  • We constantly inject an “excess” of holes into a surface of a piece of N-type silicon and we reach the steady-state. No electric field exists and the hole current is due to diffusion.

p0

0

0

p

0

Þ 0 = - [p(x)-p]/p + Dp·2[p(x)-p]/x2

After integrating Þp(x) = p + C1·e-x/Lp + C2·ex/Lp

where : Lp=(Dp· p)1/2 is the minority hole diffusion length


Power electronic devices

p0

p(x)

p

x

xN

Spatial evolution of an “excess” of minority carries (II)

p(x) = p + C1·e-x/Lp + C2·ex/Lp

xN: length of the N-type crystal

Lp: hole diffusion length

  • Cases:

  • a) Lp << xN (wide crystal): Þ p(x) = p+(p-p)·e-xLp(decay exponentially).

  • b) Lp >> xN (narrow crystal): Þ p(x) = p+(p-p)·(xN-x)/xN(decay linearly).

  • c) Other cases Þhyperbolic sine evolution.

Lp >> xN (narrow)

p0

Lp << xN (wide)

p(x)

p

Tangent line

x

xN

Lp


Power electronic devices

P-typesilicon

N-typesilicon

Al-

Al-

Al-

Al-

Al-

Al-

Al-

Al-

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Barrier to avoid carrier diffusion

+

+

+

+

+

+

+

+

+

+

Sb+

Sb+

Sb+

Sb+

Sb+

Sb+

Sb+

Sb+

Concept of PN junction (I)

What happens if we remove the barrier?


Power electronic devices

P-side

N-side

Al-

Al-

Al-

Al-

Al-

Al-

Al-

Al-

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+

+

+

+

+

+

+

+

+

+

Sb+

Sb+

Sb+

Sb+

Sb+

Sb+

Sb+

Sb+

Concept of PN junction (II)

Holes begin to diffuse from the P-side to the N-side. Similarly, electrons diffuse from the N-side to the P-side

Are all the carriers to be diffused?


Power electronic devices

Al-

Al-

Al-

Al-

Al-

Al-

Al-

Al-

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-

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-

-

-

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-

-

+

+

+

+

+

+

+

+

+

+

Sb+

Sb+

Sb+

Sb+

Sb+

Sb+

Sb+

Sb+

Concept of PN junction (III)

Are all the carriers to be diffused?

P-side

N-side

Non-neutral N-type region, but positively charged

Non-neutral P-type region, but negatively charged

Is this situation “the final situation”?

The answer is no


Power electronic devices

P-side

N-side

Al-

Al-

Al-

Al-

Al-

Al-

Al-

Al-

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-

-

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-

-

-

-

-

-

-

+

+

+

+

+

+

+

+

+

+

+

E

Sb+

Sb+

Sb+

Sb+

Sb+

Sb+

Sb+

Sb+

Concept of PN junction (IV)

An electric field appears just in the boundary between both regions (we call this boundary metallurgical junction)


Power electronic devices

Al-

Al-

Al-

Al-

Al-

Al-

Al-

Al-

-

-

-

-

+

+

+

+

E

Sb+

Sb+

Sb+

Sb+

Sb+

Sb+

Sb+

Sb+

Concept of PN junction (V)

  • Now, we do zoom over the metallurgical junction

P-side

N-type

Due to diffusion (® ¬)

Due to drift (electric field) (¨)

The electric field limits the carrier diffusion


Power electronic devices

Al-

Al-

Al-

Al-

Al-

Al-

Al-

Al-

-

-

-

-

-

-

-

+

Neutral N-type region (electronsare balanced by positive ions )

Neutral P-type region (holes are balanced by negative ions )

+

+

+

+

+

+

E

Sb+

Sb+

Sb+

Sb+

Sb+

Sb+

Sb+

Sb+

Concept of PN junction (VI)

  • Steady-state situation near the metallurgical junction

Depletion region, or space charge region, or transition region

Unbalanced charge exists because carriers barely exist


Power electronic devices

Metallurgical junction

N-side

(neutral)

P-side

(neutral)

+ -

Concept of PN junction (VII)

  • Summary and terminology

E

Many electrons, but neutral

Many holes, but neutral

V0

Depletion, or transition, or space charge region (non neutral)

There is space charge and, therefore, there are electric field E and voltage V0. However, there are almost no charge carriers


Power electronic devices

- +

- +

- +

-

-

- +

N-side

Due to drift

- +

Due to diffusion

- +

+

+

Due to drift

- +

Due to diffusion

P-side

- +

jp_Diff

jp_Drift

jn_Drift

jn_Diff

Computing the built-in voltage V0 (I)

Net current passing through any section must be zero. As neither holes nor electrons are being accumulated in any parts of the crystal, net current due to holes is zero and net current due to electrons is zero.

Currents must cancel each other

Currents must cancel each other


Power electronic devices

pP(hole concentration in P-side )

(hole concentration in N-side )pN

- +

+ -

+ -

+ -

+ -

N-side

V0

Due to diffusion

+

+

+

+

+

+

+

+

+

+

+

+

+

+

+

+

+

+

+

+

+

+

+

+

+

+

+

+

+

+

+

+

+

+

+

+

+

Zona P

Due to drift

jp_Drift

jp_Diff

Computing the built-in voltage V0 (II)

jp_Drift= - jp_Diff


Power electronic devices

Computing the built-in voltage V0 (III)

Equations:

jp_Drift= - jp_Diff

jp_Drift= q·p·p·E

jp_Diff= -q·Dp·dp/dx

E = -dV/dx

Therefore: dV = -(Dp/mp)·dp/p

After integrating :

V0= VN-side – VP-side = -(Dp/p)·ln(pN/pP) = (Dp/p)·ln(pP/pN)

Repeating the same process with electrons, we obtain:

E

V0= (Dn/n)·ln(nN/nP)

k = Boltzmann constant.

VT = 26 mV at 300 K.

It could be demonstrated:

Dp/p = Dn/n = kT/q = VT(Einstein relation)


Power electronic devices

- +

+ -

+ -

+ -

+ -

-

-

-

-

-

-

-

-

-

-

-

-

-

-

-

-

-

-

-

-

-

-

-

-

-

-

-

-

-

-

-

-

-

-

-

+

+

+

+

+

+

+

+

+

+

+

+

+

+

+

+

+

+

+

+

+

+

+

+

+

+

+

+

+

+

+

+

+

+

+

Computing the built-in voltage V0 (IV)

Summary (I)

nN

pN

pP

nP

V0

Zona P

N-side: many electrons

P-side: many holes

Almost no holes

or electrons

Almost no holes

Almost no electrons

V0 = VT·ln(pP/pN) and also V0 = VT·ln(nN/nP)


Power electronic devices

P-side

N-side

+ -

ND, nN, pN

NA, pP, nP

V0

If ND >> ni(current case)

nN = NDpN = ni2/ND

If NA >> ni (current case)

pP = NA nP = ni2/NA

Computing the built-in voltage V0 (V)

Summary (II)

V0= VT·ln(pP/pN) and also V0= VT·ln(nN/nP)

V0 = VT·ln(NA·ND/ni2), VT = 26 mV at 300 K


Power electronic devices

N-side

P-side

Al-

Al-

Al-

Al-

Al-

Al-

Al-

Al-

-

-

-

WP0

WN0

NA

ND

W0

+

+

Sb+

Sb+

Sb+

Sb+

Sb+

Sb+

Sb+

Sb+

Sb+

Depletion width in P-side and in N-side

Charge neutrality implies: NA·WP0 = ND·WN0

The heavier doped a side, the narrower the depletion region in that side


Power electronic devices

E(x)

Calculating the electric field E and the total depletion width W0 (I)

V0

rN-side

rP-side

-

+

  • We need to know:

  • The electric field E.

  • The total depletion width W0.

+

-

P-side

+

-

N-side

WP0

WN0

W0

  • We already know:

  • The charge density in both sides inside the depletion region:

  • rP-side = NA·q and rN-side = ND·q

  • The relative width of the depletion region in the P-side and in the N-side:

  • NA·WP0 = ND·WN0

  • The built-in (contact) voltage: V0= VT·ln(NA·ND/ni2)

We will use Gauss’ law and the relationship between electric field and voltage


Power electronic devices

q·ND

(x)

Charge density

x

  • Gauss’ law: ·E(x) = (x)/e

-q·NA

E(x)

E(x)

x

Electric field

-Emax0

  • Voltage and electric field: E(x) = - V

V(x)

V0

x

Voltage

Calculating the electric field E and the total depletion width W0 (II)

+

-

P-side

+

-

N-side

- V0 +

W0


Power electronic devices

E(x)

2·q·NA·ND·V0

Emax0 =

·(NA+ND)

Calculating the electric field E and the total depletion width W0 (III)

+

-

P-side

+

-

N-side

- V0 +

After applying Gauss’ law and the relationship between electric field and voltage, we obtain:

q·ND

W0

Charge density

x

2··(NA+ND)·V0

W0 =

-q·NA

q·NA·ND

x

Electric field

-Emax0

V0

x

Voltage


Power electronic devices

2·q·NA·ND·V0

Emax0 =

·(NA+ND)

Summary of the study of the PN junction with no external bias

Electric field at the metallurgical junction Emax0

- V0 +

P-side

Doped NA

N-side

Doped ND

-

+

WP0

WN0

W0

2··(NA+ND)·V0

Very important equations!!!

Almost no holes or electrons, but space charge, electric field and voltage

W0 =

q·NA·ND

V0= VT·ln(NA·ND/ni2)

W0 = WP0 + WN0

NA·WP0 = ND·WN0

N-side: many electrons

P-side: many holes

Almost no holes

Almost no electrons


Power electronic devices

-

-

+

+

VNm

VmP

No energy can be dissipated here

i = 0

V = 0

Connecting external terminals to a PN junction

metal-semiconductor contacts

+ -

N-side

P-side

-

+

V0

Therefore:

V = 0, i = 0

Hence:

VmP – V0 + VNm = 0

And:

VmP + VNm = V0

Conclusion:

The built-in voltages across each metal-semiconductor contact cancel out the effect of V0 in such a way that V0does not appear externally.


Power electronic devices

-

+ -

+

N-side

P-side

Vj

-

-

+

+

VmP

VNm

i 0

V0 becomes Vj now

-

+

Vext

Low resistivity:

VP=0

Low resistivity:

VN=0

Biasing the PN junction: forward bias

VmP and VNmdo not change and, therefore VmP+VNm= V0

Vext= VmP - Vj + VNm = V0 - Vj

Therefore: Vj = V0 - Vext

Conclusion:

The built-in voltage across the junction has decreased Vext volts


Power electronic devices

-

+ -

+

N-side

P-side

Vj

-

-

+

+

VmP

VNm

i 0

-

+

Vext

Low resistivity:

VP=0

Low resistivity:

VN=0

Biasing the PN junction: reverse bias

VmP and VNmdo not change and, therefore VmP+VNm= V0

Vext= -VmP +Vj - VNm = -V0 + Vj

Therefore: Vj = V0 + Vext

Conclusion:

The built-in voltage across the junction has increased Vext volts


Power electronic devices

+ -

N-side

P-side

-

+

Vj

i

=

-

+

Vext

Biasing the PN junction: notation for a general case

  • Conclusion:

  • Always: Vj = V0 - Vext, being:

  • 0 < Vext < V0(forward biased)

  • Vext < 0 (reverse biased)


Power electronic devices

2·q·NA·ND·V0

Emax0 =

·(NA+ND)

Effects of the bias on the depletion region

We must replace V0 with Vj, that is, replace V0 with V0-Vext

With bias

Without bias

Vj0 = V0

Vj(Vext) = V0 - Vext

2··(NA+ND)·(V0-Vext)

W(Vext) =

q·NA·ND

2··(NA+ND)·V0

W0 =

q·NA·ND

2·q·NA·ND·(V0-Vext)

Emax(Vext) =

·(NA+ND)

Always: V0= VT·ln(NA·ND/ni2)


Power electronic devices

W0

W

N-side

N-side

P-side

P-side

V0

V0-V1

V1

(x)

-

-

+

+

x

E(x)

x

-Emax

-Emax0

Vj(x)

V0

V0-V1

x

Effects of the forward bias on the depletion region

  • Less spatial charge

  • Lower electric field

  • Lower built-in voltage


Power electronic devices

W0

W

P-side

P-side

N-side

N-side

V0

V0+V2

V2

-

-

+

+

(x)

x

E(x)

x

-Emax0

-Emax

Vj(x)

V0+V2

V0

x

Effects of the reverse bias on the depletion region

  • More spatial charge

  • Higher electric field

  • Higher built-in voltage


Power electronic devices

-

-

-

-

-

-

-

-

-

-

-

-

-

-

-

-

-

-

-

-

-

-

-

-

-

-

-

-

-

-

-

-

-

-

-

-

-

-

-

-

-

-

-

-

Effects of the bias on the neutral regions (I)

nNV

nPV

nN

nP

- +

+ -

+ -

+ -

+ -

Zona P

V0

V0-Vext

P-side

No bias: V0 = VT·ln(nN/nP)

Forward bias: V0-Vext =VT·ln(nNV/nPV)

For holes with forward bias: V0-Vext =VT·ln(pPV/pNV)


Power electronic devices

-(V0-Vext)/VT

-(V0-Vext)/VT

-(V0-Vext)/VT

-(V0-Vext)/VT

nPV = nN·e

pNV = pP·e

nPV = ND·e

pNV = NA·e

Effects of the bias on the neutral regions (II)

  • The quotients nNV/nPV and pPV/pNVstrongly change with bias.

  • In practice, nNV and pPV do not change appreciably (i.e., nNV»nNand pPV» pP) for charge neutrality reasons.

  • Therefore the concentration of minority carriers (i.e., pNV and nPV) strongly changes at the depletion region edges.

  • The values of nPVand pNV can be easily obtained:

V0-Vext =VT·ln(nN/nPV) Þ

V0-Vext =VT·ln(pP/pNV) Þ

  • As nN» ND and pP» NA, then:


Power electronic devices

-

+

Vj

Vj =V0-Vext

=

-

+

+ -

Vext

Zona N

Zona P

pP = NA

nN = ND

Effects of the bias on the neutral regions (III)

-V0/VT

pN = ni2/ND = NA·e

Non-biased junction

Non-biased junction

-V0/VT

nP = ni2/NA = ND·e

Biased junction

Biased junction

-Vj/VT

pNV = NA·e

-Vj/VT

nPV = ND·e


Power electronic devices

Effects of the bias on the neutral regions (IV)

Concentration of minority carriers :

  • Forward bias: The concentration of minority carriers at the depletion region edges increases, because Vj< V0

  • Reverse bias: The concentration of minority carriers at the depletion region edges decreases, because Vj< V0

-Vj/VT

pNV = NA·e

-Vj/VT

nPV = ND·e

+ -

N-side

P-side

Vj =V0-Vext

-

+

Vj

  • Forward and reverse bias:

  • The concentration of majority carriers in neutral regions does not change


Power electronic devices

Effects of the bias on the neutral regions (V)

What happens with the minority carriers along the neutral regions?

  • This is a case of injection of an “excess” of minority carriers (see slide #36).

+ -

N-side

P-side

-

+

  • Cases of interest:

  • Lp << xN (wide N-side)

  • Þdecay exponentially

  • b) Lp >> xN (narrow N-side)

  • Þdecay linearly

Vj


Power electronic devices

Vext

Vext

P-side

N-side

P-side

N-side

Minority carrier concentration

Minority carrier concentration

pNV

nPV

pNV

nPV

pN

nP

pN

nP

0

0

Length

Length

Effects of the bias on the neutral regions (VI)

Wide P and N sides

Narrow P and N sides

The concentration of minority carriers along the neutral regions under forward biasing.

0.001 mm

0.1 mm

Excess of minority carriers

It plays a fundamental role evaluating the switching speed of electronic devices.


Power electronic devices

Vext

Vext

P-side

N-side

P-side

N-side

Minority carrier concentration

Minority carrier concentration

pNV

nPV

pNV

pN

nPV

nP

pN

nP

0

0

Length

Length

Effects of the bias on the neutral regions (VII)

Wide P and N sides

Narrow P and N sides

The concentration of minority carriers along the neutral regions under reverse biasing.

0.001 mm

0.1 mm

Deficit (negative excess) of minority carriers


Power electronic devices

Example of a silicon PN junction

Properties of Si at 300 K

P -side

N-side

Dp=12.5 cm2/s

Dn=35 cm2/s

p=480 cm2/V·s

n=1350 cm2/V·s

ni=1010 carriers/cm3

r=11.8

NA=1015 atm/cm3

p=100 ns

Lp=0.01 mm

ND=1015 atm/cm3

n=100 ns

Ln=0.02 mm

Carriers/cm3

1016

pP

nN

1014

1012

nPV

1010

pNV

108

106

104

-0.3

0.3

-0.2

0.2

-0.1

0

0.1

Length [mm]

Carriers along the overall device

V0=0.596 V

Forward biased with Vext = 0.48 V

Log scale

They decay exponentially

(log scale)


Power electronic devices

Calculating the current passing through a PN junction (I)

  • We have addressed a lot of important issues related the PN junction:

  • Charge, electric field and voltage across the depletion region.

  • Concentration of majority and minority carriers along the total device.

  • However, the most important issue has not been addressed so far:

  • How can we compute the current passing through the device?

  • Fortunately, we already have the tools to answer this question.


Power electronic devices

Vext

Vj

- +

N-side

P-side

P

N

0.3m

several mm

Calculating the current passing through a PN junction (II)

Case of wide P and N sides

jtotal

jtotal

jtotal = jp_total(x) + jn_total(x) = jp_Drift(x) + jp_Diff(x) +jn_Drift(x) + jn_Diff(x)

  • Two questions arise:

  • What carrier must be evaluated to compute the overall current?

  • Where?

  • Places:

  • Depletion region 1 .

  • Neutral regions far from the depletion region 2 .

  • Neutral regions, but near the depletion region edges 3 .

3

1

2

2

3


Power electronic devices

Vext

Vj

- +

N-side

P-side

P

N

0.3m

several mm

Log scale

Carriers/cm3

1016

nP

pN

pNV

nPV

1mm

1014

Calculating the current passing through a PN junction (III)

Computing the overall current from the current density due to carriers in the depletion region

jtotal

jtotal

jtotal = jp_Drift(x) + jp_Diff(x) +jn_Drift(x) + jn_Diff(x)

Currents due to drift (jp_Drift and jn_Drift) have opposite direction to currents due to diffusion. Both currents have extremely high values (very high electric field and carrier concentration gradient) and cannot be determined precisely enough to guarantee that the difference (which is the total current) is properly computed. Therefore, this is not the right place.


Power electronic devices

Calculating the current passing through a PN junction (IV)

Computing the overall current from the current density due to carriers in the neutral regions far from the depletion region

Vext

jtotal

Vj

- +

P-side

P

N

jtotal = jp_Drift(x) + jp_Diff(x) +jn_Drift(x) + jn_Diff(x)

» 0

» 0

» 0

High concentration

Constant concentration

Weak field

  • jp_Drift(x) = q·p·p(x)·E(x)

  • jn_Drift(x) = q·n·n(x)·E(x)

jp_Diff (x) = -q·Dp·dp(x)/dx

jn_Diff(x) = q·Dn·dn(x)/dx

Few electrons in P-side

Current is due to drift of majority carriers. However, it cannot be determined properly because we do not know the value of the “weak” electric field. Therefore, these are not the right places.


Power electronic devices

Calculating the current passing through a PN junction (V)

Computing the overall current from the current density due to carriers in the neutral regions but near the depletion region edges (I)

Vext

jtotal

Vj

- +

P-side

P

N

jtotal = jp_Drift(x) + jp_Diff(x) +jn_Drift(x) + jn_Diff(x)

» 0

High concentration

Weak field

  • jp_Drift(x) = q·p·p(x)·E(x)

  • jn_Drift(x) = q·n·n(x)·E(x)

jp_Diff (x) = -q·Dp·dp(x)/dx

jn_Diff(x) = q·Dn·dn(x)/dx

Few electrons in P-side

We cannot compute the total current yet, but we can compute the current density due to minority carriers:

jn_total (x) = jn_Drift(x) + jn_Diff(x) » jn_Diff(x) = q·Dn·dn(x)/dx


Power electronic devices

Calculating the current passing through a PN junction (VI)

Computing the overall current from the current density due to carriers in the neutral regions but near the depletion region edges (II)

We can do the same for the holes just in the opposite side of the depletion region

Vext

Vj

N-side

P-side

jn_total(x)

P

N

- +

jp_total(x)

Current density

jn_total(x)

nPV

jp_total(x)

pNV

Minority carrier concentration

pN

nP

Length

0

Length

0

jn_total(x) = q·Dn·dnPV(x)/dx

jp_total(x)= -q·Dp·dpNV(x)/dx

Taking derivatives


Power electronic devices

Calculating the current passing through a PN junction (VII)

Computing the overall current from the current density due to carriers in the neutral regions but near the depletion region edges (III)

What happens with carriers in the depletion region?

Vext

Vj

N-side

P-side

jn_total(x)

P

N

- +

Current density of minority carriers

jp_total(x)

jn_total(x)

jp_total(x)

Length

0

The carrier density currents passing through the depletion region are constant because the probability of carrier recombination is very low, due to the low carrier concentration in that region.


Power electronic devices

Calculating the current passing through a PN junction (VIII)

Computing the overall current from the current density due to carriers in the neutral regions but near the depletion region edges (IV)

Vext

Now the total current density can be easily computed

Vj

N-side

P-side

jn_total(x)

P

N

- +

jtotal

jp_total(x)

Current density

jn_total(x)

jp_total(x)

Very important conclusion!!!

Length

0

  • The total current density passing through the device can be computed as the addition of the two minority current densities at the edges of the depletion region


Power electronic devices

Calculating the current passing through a PN junction (IX)

Summary of the computing of the overall current density in a PN junction

Vj

jn_total(x)

P-side

N-side

- +

  • We need to know the variation of the minority carrier concentrations at the depletion region edges.

  • We have to calculate the gradients of these concentrations (taking derivatives).

  • We have to calculate the current densities due to these minority carriers, which are diffusion currents.

  • We must add both current densities to obtain the total current density, which is constant along all the device. This is the total current density passing through the device.

jp_total(x)


Power electronic devices

Calculating the current passing through a PN junction (X)

  • Once the total current density and the minority-carrier current densities are known, the majority-carrier current density can be easily calculated by difference.

Vj

jn_total(x)

P-side

N-side

- +

Total current

jtotal

jp_total(x)

Current density

jn_total(x)

jp_total(x)

Majority-carriercurrents, duetobothdrift and diffusion

Length

0

Minority-carrier currents, only due to diffusion


Power electronic devices

Current passing through an asymmetrical junction (P+N-)

P-side is heavily doped (P+) and wide

N-side is slightly doped (N-) and narrow

nPV

Vext

Vj

N--side

P+-side (wide)

jn_total(x)

- +

jn_total(x)

pNV

Current density

Concentration

pN

nP

Length

0

Length

0

This is a case of special interest, because it is directly related to the operation of Bipolar Junction Transistors (BJTs)

jtotal

jp_total(x)


Power electronic devices

Qualitative study of the current in a forward-biased PN junction

Vext

Vj

N-side

P-side

jtotal

P

N

- +

Current density

High slope Þ High current density due to electrons in the depletion region

High slope Þ High current density due to holes in the depletion region

nPV

jn_total(x)

jp_total(x)

pNV

Minority carrier concentration

pN

nP

Length

jtotal

0

Length

0

High and positive total current density


Power electronic devices

jp_total(x)

Qualitative study of the current in a reverse-biased PN junction

Vext

Vj

N-side

P-side

jtotal

P

N

- +

Current density

0

Length

pNV

nPV

Low slope Þ Low current density due to electrons in the depletion region

Low slope Þ Low current density due to holes in the depletion region

Minority carrier concentration

pN

nP

Low and negative total current density

Length

0

jn_total(x)

jtotal


Power electronic devices

Quantitative study of the current in a PN junction (I)

Procedure:

1- Compute the concentration of minority holes (electrons) in the proper edge of the depletion region when a given voltage is externally applied.

2- Compute the excess minority hole (electron) concentration at the above mentioned place. It is also a function of the externally applied voltage.

3- Compute the decay of the excess minority hole (electron) concentration (exponential, if the semiconductor side is wide, or linear, if it is narrow).

4- Compute the gradient of the decay of the excess minority hole (electron) concentration just at the proper edge of the depletion region.

5- Compute the diffusion current density due to the above mentioned gradient.

5- Once the current due to minority holes (electrons) has been calculated, repeat the same process with electrons (holes).

6-Add both current densities.

7- Compute the total current by multiplying the current density by the cross-sectional area.


Power electronic devices

i

+

P

Vext

N

-

Quantitative study of the current in a PN junction (II)

The final results is:

i = IS·(eVext/VT- 1), where:

IS = A·q·ni2·[Dp/(ND·Lp)+Dn/(NA·Ln)]

(Is is called reverse-bias saturation current)

VT = kT/q

where:

A = cross-sectional area.

q = magnitude of the electronic charge (1.6·10-19 coulombs).

ni = intrinsic carrier concentration.

Dp = hole diffusion coefficient.

Dn = electron diffusion coefficient.

Lp= hole diffusion length in N-side.

Ln= electron diffusion length in P-side.

ND = donor concentration.

NA = acceptor concentration.

k = Boltzmann constant.

T = absolute temperature (in Kelvin).

(Shockley equation)


Power electronic devices

i [mA]

100

Vext [V]

0

- 0.25

0.25

0.5

Vext

i »IS·e

i [nA]

VT

Vext [V]

0

-0.5

-10

Quantitative study of the current in a PN junction (III)

i = IS·(eVext/VT- 1)

IS = A·q·ni2·[Dp/(ND·Lp)+Dn/(NA·Ln)]

VT = kT/q

  • Forward bias VO > Vext >> VT

Þexponential dependence

  • Reverse bias Vext << -VT

i » -IS

Þ constant

(reverse-bias saturation current)


Power electronic devices

Vext

Vext

P-side

N-side

P-side

N-side

Minority carrier concentration

Minority carrier concentration

pNV

nPV

pNV

nPV

pN

nP

pN

nP

0

0

Length

Length

Quantitative study of the current in a PN junction (IV)

Wide versus narrow P and N sides

Wide sides

Narrow sides

XP

XP << Ln

XN

XN << Lp

XP

XP >> Ln

XN

XN >> Lp

IS = A·q·ni2·[Dp/(ND·Lp)+Dn/(NA·Ln)]

IS = A·q·ni2·[Dp/(ND·XN)+Dn/(NA·XP)]

Equation i = IS·(eVext/VT- 1) is valid in both cases


Power electronic devices

-

+ -

+

N-side

P-side

Vj

-

-

+

+

i [A]

VmP

VNm

3

Vext

i 0

VP¹ 0

VN¹ 0

Vext [V]

0

1

-4

Quantitative study of the current in a PN junction (V)

The I-V characteristic in a real scale of use

  • Equation i = IS·(eVext/VT- 1) describes the operation in the range VO > Vext > -. However, three questions arise:

  • What happens if Vext > VO?

  • How does the temperature affect this characteristic?

  • What is the actual maximum voltage that the junction can withstand?

Actual I-V characteristic

According to Shockley equation

+ -

+ -

When Vext appraches V0 (or it is even higher), the current passing is so high that the voltage drop in the neutral regions is not zero. This voltage drop is proportional to the current (it behaves as a resistor).


Power electronic devices

Decreases with T

Increases with T

Temperature dependence of the I-V characteristic (I)

  • Reverse bias: i » -IS

where: IS = A·q·ni2·[Dp/(ND·Lp)+Dn/(NA·Ln)].

It should be taken into account that ni strongly depends on the temperature.

Therefore:

Reverse current strongly increases when the temperature increases. It doubles its value when the temperature increases 10 oC.

  • Forward bias: i » IS·eVext/VT= IS·eq·Vext/kT

In practice, forward current increases when the temperature increases. For extremely high currents, the dependence can become just the opposite.


Power electronic devices

Forward bias

Reverse bias

i

i [mA]

+

i [A]

30

P

V

Vext [V]

370C

N

-0.25

-

27 0C

27 0C

Vext [V]

37 0C

0

1

-10

Temperature dependence of the I-V characteristic (II)

In both cases, the current increases for a given external voltage.


Power electronic devices

+ -

N

+ -

P

+ -

-

-

-

i

+ Vext -

i

Vext

+

+

+

0

Maximum reverse voltage that a PN junction can withstand

  • There are three different physical processes which limit the reverse voltage that a given PN junction can withstand:

  • Punch-through

  • Zener breakdown

  • Avalanche breakdown

It will be explained later

This phenomenon does not take place in power devices (two heavily doped regions are needs).

  • Actual reverse current is higher than predicted due to the generation of electron-hole pairs by collisions with the lattice.

  • If the electric field is high enough, this phenomenon becomes degenerative.


Power electronic devices

Electric field in the depletion region with reverse bias

No bias

Reverse bias

2··(NA+ND)·(V0+Vrev)

W(Vrev) =

q·NA·ND

2··(NA+ND)·V0

W0 =

q·NA·ND

W0

W(Vrev)

2·q·NA·ND·(V0+Vrev)

Emax(Vrev) =

-

-

+

+

P

N

P

N

·(NA+ND)

V0

V0+Vrev

2·q·NA·ND·V0

Emax0=

·(NA+ND)

-Emax0

  • As already known, both the electric field and depletion length increase.

  • When the maximum electric field is high enough, the avalanche breakdown starts.

-Emax(Vrev)


Power electronic devices

Limits for the depletion region with reverse bias

Punch-through limit

WPN

2·q·NA·ND·|Vrev|

-

N

W(Vrev)

+

P

Emax(Vrev) »

·(NA+ND)

  • We must design the semiconductor according to: Emax(Vrev) < EBR.

  • The breakdown voltage is:

  • VBR = EBR2·e·(NA + ND)/(2q·NA·ND).

» |Vrev|

2··(NA+ND)·|Vrev|

-Emax

W(Vrev) »

q·NA·ND

-EBR

  • Moreover, W(Vrev) < WPN to avoid the phenomenon called punch-through.

Avalanche breakdown limit

  • Usually W(VBR) < WPN, which means that practical voltage limit is not due to punch-through, but to avalanche breakdown.


Power electronic devices

What must we do to withstand high-voltage?

Þ

EBR2·e 1 1

VBR = ·( + )

NA

ND

  • A high value of VBR is obtained if one of the two regions has been slightly doped (i.e., either NA or ND is relatively low).

  • However, it should taken into account that low values of ND (NA) implies:

  • Wide WN (WP), which also implies wide XN (XP) to avoid punch-through.

  • Low nN (pP) and, therefore, low conductivity.

  • If we have long length and low conductivity, then we have high resistivity.

  • Hence, a trade-off between resistivity and breakdown voltage must be established.

2q

EBR2·e·(NA + ND)

VBR =

2·q·NA·ND

-

+

P+

N--side

NA

ND

pP = NA

nN = ND

WN

NA >> ND

XN


Power electronic devices

Maximum electric field Emax with reverse bias Vrev

q·ND

(x)

NA >> ND

  • Can we increase VBR for a given EBR value?

  • - Yes, we can. We must modify the electric field profile.

  • - The result is the PIN junctions.

x

-q·NA

x

-Emax

-EBR

VBR

-

+

P+

N--side

NA

ND

The main part of the reverse voltage is dropping in the slightly doped region.

Vrev_N

Vrev

x

Vrev_P

94


Power electronic devices

PIN junctions (I)

  • Main idea: the voltage across the device is proportional to the dashed area (E(x) = - dV/dx).

  • Can we have the same area (same voltage across the device) with a lower value of Emax(Vrev)?

  • Yes, we can. We need another E(x) profile.

-Emax(Vrev) new profile (ideal)

  • To obtain this profile, we need a region without space charge (undoped) inside the PN junction.

W(Vrev)

-Emax(Vrev)

-Emax(Vrev)

-

+

P

N

Vrev

-Emax(Vrev) new profile (real)

95

-Emax(Vrev)


Power electronic devices

PIN junctions (II)

  • It means P-Intrinsic-N

A few holes and electrons

Negative space charge

Positive space charge

Many holes

Many electrons

P-side

+

-

N-side

Intrinsic

q·ND

(x)

x

  • Characteristics:

  • - Good forward operation due to conductivity modulation.

  • - Low depletion capacitance.

  • - Slow switching operation.

  • All these characteristics will be explained later.

-q·NA

x

-Emax

Vrev

x

96


Power electronic devices

Other structure to withstand high voltage: P+N-N+

Heavily doped P

Lightly doped N

Heavily doped N

q·(ND2-ND1)

(x)

N-

q·ND1

NA

ND1

P+

N+

ND2

-

+

+

Partially depleted

q·ND2

x

-q·NA

Low reverse voltage Vrev1

x

Reverse voltage Vrev2

-Emax(Vrev1)

Vrev2 > Vrev1

-Emax(Vrev2)

97


Power electronic devices

Forward-bias behaviour of structures to withstand high voltage

PIN

Undoped

In both cases, there is a high-resistivity layer

(called drift region)

N+

N+

P+

P+

N-

Intrinsic

Lightly doped

P+N-N+

  • This means that, when forward biased, bad behaviour might be expected.

  • However, a new phenomenon arises and the result is quite better than expected.

  • This phenomenon is called conductivity modulation. In this case, high-level injection takes place.


Power electronic devices

Carriers/cm3

1016

1014

1012

1010

108

106

104

0- 0+

0- 0+

-0.3

-0.3

0.3

0.3

-0.2

-0.2

0.2

0.2

-0.1

-0.1

0.1

0.1

Length [mm]

Length [mm]

Injection levels

Low-level injection:

nN(0+) >> pNV(0+)

High-level injection:

nN(0+) »pNV(0+)

nN

pP

pP

nN

nPV

P+-side

P+-side

N--side

N--side

Not possible!

pNV

Log scale

Log scale

nPV

pNV

  • Low-level injection has been assumed so far, for PN and P+N- junctions.

  • In the case of a P+N- junction, this assumption is only valid if the forward bias is not very intense. Else, high-level injection starts.

  • If the forward voltage is high enough, pNV(0+) approaches nN(0+). In this case, nN does not remain constant any more, but it notably increases.


Power electronic devices

Conductivity modulation

ND1 = 1014

NA = 1019

N+

ND2 = 1019

P+

N-

Drift region

nN-»pN-

1016

P+N-N+

1014

Holes are injected from the P+-side

pN+

nP+

106

  • There is carrier injection from both highly doped regions to the drift region. This is called double injection.

  • This phenomenon substantially increases the carrier concentration in the drift region, thus dramatically reducing the device resistivity.

10

10

Electrons are injected from the N+-side


Power electronic devices

Semiconductor junctions designed to withstand high voltage

Summary

P+N-N+

PIN

  • A high-resistivity region (drift region) is needed to withstand high voltage when the junction is reverse biased.

  • Fortunately, this high-resistivity “magically” disappears when the junction is forward biased if the device is properly designed to have conductivity modulation.

  • Due to this, devices where the current is passing through P-type and N-type regions (bipolar devices) have superior performances in on-state than devices where the current always passes through the same type (either P or N) of extrinsic semiconductor (unipolar devices).

  • Unfortunately, bipolar devices have inferior switching characteristics than unipolar devices.

  • Due to this, a trade-off between conduction losses and switching losses has to be established frequently selecting power semiconductor devices.


Power electronic devices

Transient and AC operation of a PN junction

If we change the bias conditions instantaneusly, can the current change instantaneusly as well?

  • The answer is “no, it cannot”.

  • This is due to the fact that the current conducted by a PN junction depends on the minority carrier concentration just at the edges of the depletion region and the voltage withstood by a PN junction depends on the depletion region width.

  • In both cases, carriers have to be either generated or recombined or moved, which always takes time.

  • These non-idealities can characterize as:

  • Parasitic capacitances (useful for linear applications)

  • Switching times (useful for switching applications)


Power electronic devices

-

-

+

+

P-side

Zona N

VO+Vext

VO+Vext+Vext

(x)

Vext

Vext + Vext

x

N-side

Carriers are pulled out from the depletion region when Vext is increased in Vext . Additional space charge has been generated.

Parasitic capacitances: depletion layer capacitance (I)

(also known as junction capacitance)

This is the dominant capacitance in reverse bias


Power electronic devices

Vext + Vext

Vext

Vext

+ + +

+ + + + +

-

+

N

P

- - - - -

- - -

Vext + Vext

-

+

N

P

-

+

Parasitic capacitances: depletion layer capacitance (II)

PN junction

Capacitor

  • Capacitor: new charges are located at the same distance Þconstant capacitance.

  • PN junction: new charges are located farther away from each other Þ non-constant capacitance.


Power electronic devices

dQ

-dQ

W(Vext)

2··(NA+ND)·(V0-Vext)

W(Vext) =

q·NA·ND

·q·NA·ND

Cj = A·

2·(NA+ND)·(V0-Vext)

Cj

Vext

0

Parasitic capacitances: depletion layer capacitance (III)

  • As it is a non-constant capacitance, static and dynamic capacitances could be defined. The latter is defined as:

Cj=dQ/dV=·A/W(Vext)

As:

Then:

In an “abrupt” PN junction (as we have considered so far), this capacitance is a K·(V0-Vext)-1/2 -type function


Power electronic devices

Cj

Vext

0

Reverse bias

Forward bias

Parasitic capacitances: diffusion capacitance (I)

This capacitance is the one dominant in forward bias

  • Cj increases when the PN junction is forward biased.

  • However, depletion layer capacitance only dominates the reactance of a PN junction under reverse bias.

  • For forward bias, the diffusion capacitance (due to the charge stored in the neutral regions) becomes dominant.


Power electronic devices

1016

pP

nN

1014

V=240mV

nPV

Carriers/cm3

pNV

Increase of minority carriers due to a increase of 60mV in forward bias

1012

V=180mV

1010

Longitud [mm]

-3

3

-2

2

-1

0

1

Parasitic capacitances: diffusion capacitance (II)

  • This increase in electric charge is a function of the forward bias voltage.

  • This means that a capacitive effect takes place in these conditions.

  • The dynamic capacitance thus obtained is called diffusion capacitance.


Power electronic devices

R

i

a

b

+

V2

v

V1

-

i

V1/R

t

t

v

Switching times in PN junctions (I)

Let us consider a PN diode as PN junction. The results obtained can be generalized to PN junctions in other semiconductor devices.

Transition from “a” to “b” (switching off) in a wide time scale (ms or s).

The diode behaviour seems to be ideal in this time scale.

-V2


Power electronic devices

R

i

a

b

+

V2

v

V1

V1/R

i

-

trr

t

-V2/R

ts

tf(i= -0.1·V2/R)

v

t

-V2

Switching times in PN junctions (II)

Transition from “a” to “b” (switching off) in a narrow time scale (ms or ns).

ts = storage time.

tf = fall time.

trr = reverse recovery time.

Reverse recovery peak


Power electronic devices

R

i

a

b

+

V2

v

V1

Carriers/cm3

-

i

8·1013

V1/R

t0

t0

t1

pNV

nPV

t3

t4

t

4·1013

t0

t0

t1

t2

t3

t2

t4

-V2/R

0

v

t

-0.1

0.1

0

Length [mm]

-V2

Switching times in PN junctions (III)

  • Why does this evolution occur?

  • This is because the junction cannot withstand voltage until all the excess of minoritary carriers disappears from the neutral regions.


Power electronic devices

R

i

a

b

+

V2

v

V1

-

i

Carriers/cm3

8·1013

0,9·V1/R

t4

t1

t3

pNV

nPV

t4

0,1·V1/R

4·1013

td

t2

t3

t1

t2

t0

tr

tfr

0

t0

-0. 1

0.1

0

Length [mm]

Switching times in PN junctions (IV)

Transition from “b” to “a” (switching on) in a narrow time scale (ms or ns).

td = delay time.

tr = rise time.

tfr = td + tr = forward recovery time.


Power electronic devices

Trade-off between static and dynamic behaviourin PN junctions

  • P+N-N+ and PIN structures allow us to combine high reverse voltage (due to a wide drift region) and low forward resistivity (due to conductivity modulation).

  • However, these structures imply large excess of minority carriers (even majority carries due to conductivity modulation). This excess of carriers must be eliminated when the device switches off to allow the device to withstand voltage.

  • The time to remove this excess of carriers depends on the width of the drift layer. If the drift layer is shorter than a hole diffusion length, then very little charge is stored and the device switches off fast. In this case, however, the device cannot withstand high reverse voltages.

ND1 = 1014

NA = 1019

N+

ND2 = 1019

P+

N-

Excess of electrons in N-

nN-»pN-

Excess of holes in N-

1016

nP+

pN+

1014

Log scale

106

Excess of electrons in P+

Excess of holes in N+

10

10

  • The switching process can be made still faster by purposely adding “recombination centers”, such as Au atoms in Si, to increase the recombination rate. However, this fact can deteriorate the conductivity modulation.


Power electronic devices

N-type semiconductor

Metal

-

-

+

+

-

-

-

+

+

N

-

N-type

-

+

+

-

+

+

Electrons (thin sheet)

Donor ions

Introduction to the metal-semiconductor junctions (I)

  • Metals have many more electrons than semiconductors. However, metals and semiconductors are different materials. This is not the case of a PN junction, where the two sides (P and N) are made up of the same material.

  • In a PN junction made up of a given semiconductor, electrons (holes) move from the N-side (P-side) to the P-side (N-side) due to diffusion, until the built-in voltage establishes an equilibrium between diffusion and drift currents.

  • In a metal-semiconductor junction, the electron movement when the junction is being built strongly depends on the work function of both materials. The higher the work function, the more difficult for the electrons to eject the material.

  • 4 possibilities exist when you build a Metal-Semiconductor (MS) junction:

Case #1: an N-type semiconductor transfers electrons to a metal


Power electronic devices

P-type semiconductor

Metal

Lack of electrons (thin sheet )

P

Acceptor ions

-

-

+

+

+

-

+

-

+

P-type

-

+

-

+

+

-

-

Introduction to the metal-semiconductor junctions (II)

Case #2: a metal transfers electrons to a P-type semiconductor

Recombination between the transferred electrons and the P-side holes takes place in this edge.

  • In Case #1 and Case #2, a depletion region in the semiconductor side has been generated.

  • This depletion region has a built-in voltage that stops the electron diffusion.

  • This built-in voltage can be decreased by external forward bias (thus allowing massive electron diffusion) or increased by external reverse bias (avoiding electron diffusion).

  • The final result is that it works like a rectifying contact (similar to a PN junction).


Power electronic devices

N-type semiconductor

Metal

-

-

+

+

-

-

+

+

Lack of electrons

(thin sheet)

Electrons

(thin sheet)

-

-

+

+

N-type

-

-

+

+

-

-

+

+

-

-

+

+

-

-

+

+

-

-

+

+

P-type semiconductor

Metal

Holes

(thin sheet)

Electrons

(thin sheet)

P-type

Introduction to the metal-semiconductor junctions (III)

Case #3: a metal transfers electrons to an N-type semiconductor

Case #4: a P-type semiconductor transfers electrons to a metal

  • We have an ohmic contact (non-rectifying contact) in both cases.


Power electronic devices

W0

2··V0

-

-

W0 =

+

+

-

-

q·ND

-

+

+

N

-

N-type

-

Metal

+

+

-

+

+

2·q·ND·V0

Emax0 =

·q·ND

Cj0 = A·

2·V0

Rectifying contacts (I)

Case #1: an N-type semiconductor transfers electrons to a metal

ND

  • The width of the depletion region, the maximum electric field and the depletion layer capacitance can be calculated as in the case of a PN junction with an extremely-doped P side (i.e., NA® ).

  • Therefore:

However, the built-in voltage and the I-V characteristic depend on the work function of both the semiconductor and the metal.


Power electronic devices

Rectifying contacts (II)

  • Built-in voltage:

  • V0 = (Fm - Fs_N)/q, where:

  • Fm =metal work function.

  • FS_n =N-type semiconductor work function.

  • Barrier voltage to avoid electron diffusion without bias:

  • VB = (Fm - cS_n)/q, where:

  • cS_n=N-type semiconductor electron affinity.

To define these concepts properly, we should introduce others. This task, however, is beyond the scope of this course.

  • I-V characteristic:

  • i = IS·(eVext/VT- 1),as in a PN junction.

  • However, the value of Is has a very different value:

  • IS = A*·A·T2·e-VB/VT, where:

  • A* = Richardson constant (120 amps/(cm2·K2)).


Power electronic devices

Schematic Symbol

Rectifying contacts (III)

  • There is a type of diode based on the operation of a rectifying contact. It is the Schottky diode. Schottky diodes are widely used in many applications, including RF (telecom) circuits and low-voltage, medium-power power converters.

  • Main features:

  • Lower forward voltage drop than a similar-range, PN-junction diode.

  • They are faster than PN diodes because minority carriers hardly play any role in the current conduction process. They are majority carrier devices.

  • However, they always have a higher reverse current (this is not a big problem).

  • When they are made up of silicon, the maximum reverse voltage (compatible with reasonable drop voltage in forward bias) is about 200 V.

  • However, Schottky diodes made up of wide-bandgap materials (such as silicon carbide and gallium nitride) reach breakdown voltages as high as 600-1200 V.


Power electronic devices

Ohmic contacts

  • There are two different possibilities to obtain ohmic contacts:

  • a) According to the previous slides, to have an MS junction corresponding to Case #3 or to Case #4.

  • b) To have MS junctions corresponding to Cases #1 or #2, but with an extremely-doped semiconductor side (1019 atoms/cm3). In this situation, electrons can flow in both directions by a tunneling process.

P

N+

P+

N

NA1 = 1019

NA2 = 1016

ND1 = 1016

ND2 = 1019

Beyond the scope of this course, as well.

Ohmic contacts

Ohmic contacts

N+

N

PN diode

ND1 = 1016

ND2 = 1019

Rectifying contacts

Ohmic contacts

Schottky diode


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