VLSI Arithmetic Lecture 5

1. VLSI ArithmeticLecture 5  Prof. Vojin G. Oklobdzija University of California http://www.ece.ucdavis.edu/acsel

2. Review Lecture 4

3. Ling�s Adder Huey Ling, �High-Speed Binary Adder� IBM Journal of Research and Development, Vol.5, No.3, 1981. Used in: IBM 3033, IBM S370/168, Amdahl V6, HP etc.

4. Oklobdzija 2004 Computer Arithmetic 4 Ling�s Derivations

5. Oklobdzija 2004 Computer Arithmetic 5 Ling�s Derivations

6. Oklobdzija 2004 Computer Arithmetic 6 Ling Adder

7. Oklobdzija 2004 Computer Arithmetic 7 Ling Adder

8. Oklobdzija 2004 Computer Arithmetic 8 Ling Adder

9. Oklobdzija 2004 Computer Arithmetic 9 Advantages of Ling�s Adder Uniform loading in fan-in and fan-out H16 contains 8 terms as compared to G16 that contains 15. H16 can be implemented with one level of logic (in ECL), while G16 can not (with 8-way wire-OR). (Ling�s adder takes full advantage of wired-OR, of special importance when ECL technology is used - his IBM limitation was fan-in of 4 and wire-OR of 8)

10. Oklobdzija 2004 Computer Arithmetic 10 Ling: Weinberger Notes

11. Oklobdzija 2004 Computer Arithmetic 11 Ling: Weinberger Notes

12. Oklobdzija 2004 Computer Arithmetic 12 Ling: Weinberger Notes

13. Oklobdzija 2004 Computer Arithmetic 13 Advantage of Ling�s Adder 32-bit adder used in: IBM 3033, IBM S370/ Model168, Amdahl V6. Implements 32-bit addition in 3 levels of logic Implements 32-bit AGEN: B+Index+Disp in 4 levels of logic (rather than 6) 5 levels of logic for 64-bit adder used in HP processor

14. Oklobdzija 2004 Computer Arithmetic 14 Implementation of Ling�s Adder in CMOS(S. Naffziger, �A Subnanosecond 64-b Adder�, ISSCC � 96)

15. Oklobdzija 2004 Computer Arithmetic 15

16. Oklobdzija 2004 Computer Arithmetic 16

17. Oklobdzija 2004 Computer Arithmetic 17

18. Oklobdzija 2004 Computer Arithmetic 18

19. Oklobdzija 2004 Computer Arithmetic 19

20. Oklobdzija 2004 Computer Arithmetic 20

21. Oklobdzija 2004 Computer Arithmetic 21

22. Oklobdzija 2004 Computer Arithmetic 22

23. Oklobdzija 2004 Computer Arithmetic 23

24. Oklobdzija 2004 Computer Arithmetic 24

25. Oklobdzija 2004 Computer Arithmetic 25

26. Oklobdzija 2004 Computer Arithmetic 26 Ling Adder Critical Path

27. Oklobdzija 2004 Computer Arithmetic 27 Ling Adder: Circuits

28. Oklobdzija 2004 Computer Arithmetic 28 LCS4 � Critical G Path

29. Oklobdzija 2004 Computer Arithmetic 29 LCS4 � Logical Effort Delay

30. Oklobdzija 2004 Computer Arithmetic 30 Results: 0.5u Technology Speed: 0.930 nS Nominal process, 80C, V=3.3V

31. Prefix Addersand Parallel Prefix Adders

32. Oklobdzija 2004 Computer Arithmetic 32

33. Oklobdzija 2004 Computer Arithmetic 33 Prefix Adders

34. Oklobdzija 2004 Computer Arithmetic 34

35. Oklobdzija 2004 Computer Arithmetic 35 Parallel Prefix Adders: variety of possibilities

36. Oklobdzija 2004 Computer Arithmetic 36 Pyramid Adder:M. Lehman, �A Comparative Study of Propagation Speed-up Circuits in Binary Arithmetic Units�, IFIP Congress, Munich, Germany, 1962.

37. Oklobdzija 2004 Computer Arithmetic 37 Parallel Prefix Adders: variety of possibilities

38. Oklobdzija 2004 Computer Arithmetic 38 Parallel Prefix Adders: variety of possibilities

39. Oklobdzija 2004 Computer Arithmetic 39 Hybrid BK-KS Adder

40. Oklobdzija 2004 Computer Arithmetic 40 Parallel Prefix Adders: S. Knowles 1999

41. Oklobdzija 2004 Computer Arithmetic 41 Parallel Prefix Adders: Ladner-Fisher

42. Oklobdzija 2004 Computer Arithmetic 42 Parallel Prefix Adders: Ladner-Fisher(16,8,4,2,1)

43. Oklobdzija 2004 Computer Arithmetic 43 Parallel Prefix Adders: Kogge-Stone

44. Oklobdzija 2004 Computer Arithmetic 44 Kogge-Stone Adder

45. Oklobdzija 2004 Computer Arithmetic 45 Parallel Prefix Adders: Brent-Kung Set the fan-out to one Avoids explosion of wires (as in K-S) Makes no sense in CMOS: fan-out = 1 limit is arbitrary and extreme much of the capacitive load is due to wire (anyway) It is more efficient to insert buffers in L-F than to use B-K scheme

46. Oklobdzija 2004 Computer Arithmetic 46 Brent-Kung Adder

47. Oklobdzija 2004 Computer Arithmetic 47 Parallel Prefix Adders: Han-Carlson Is a hybrid synthesis of L-F and K-S Trades increase in logic depth for a reduction in fan-out: effectively a higher-radix variant of K-S. others do it similarly by serializing the prefix computation at the higher fan-out nodes. Others, similarly trade the logical depth for reduction of fan-out and wire.

48. Oklobdzija 2004 Computer Arithmetic 48 Parallel Prefix Adders: variety of possibilities

49. Oklobdzija 2004 Computer Arithmetic 49 Parallel Prefix Adders: variety of possibilitiesKnowles 1999 Following rules are used: Lateral wires at the jth level span 2j bits Lateral fan-out at jth level is power of 2 up to 2j Lateral fan-out at the jth level cannot exceed that a the (j+1)th level.

50. Oklobdzija 2004 Computer Arithmetic 50 Parallel Prefix Adders: variety of possibilitiesKnowles 1999 The number of minimal depth graphs of this type is given in: at 4-bits there is only K-S and L-F, afterwards there are several new possibilities.

51. Oklobdzija 2004 Computer Arithmetic 51 Parallel Prefix Adders: variety of possibilities example of a new 32-bit adder [4,4,2,2,1]

52. Oklobdzija 2004 Computer Arithmetic 52 Parallel Prefix Adders: variety of possibilities Example of a new 32-bit adder [4,4,2,2,1]

53. Oklobdzija 2004 Computer Arithmetic 53 Parallel Prefix Adders: variety of possibilitiesKnowles 1999 Delay is given in terms of FO4 inverter delay: w.c. (nominal case is 40-50% faster) K-S is the fastest K-S adders are wire limited (requiring 80% more area) The difference is less than 15% between examined schemes

54. Oklobdzija 2004 Computer Arithmetic 54 Parallel Prefix Adders: variety of possibilitiesKnowles 1999 Conclusion Irregular, hybrid schmes are possible The speed-up of 15% is achieved at the cost of large wiring, hence area and power Circuits close in speed to K-S are available at significantly lower wiring cost