Diamond inner region for thermal modeling
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Diamond Inner Region for Thermal Modeling. Brian Maynard April 30, 2010. Assumed Material Properties. Power dissipation for irradiated silicon (input to ANSYS). Power dissipation at 1e16 n eq /cm 2 ~122 mW/cm 2 (from T. Affolder ). For annealed silicon, we simply multiply

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Diamond Inner Region for Thermal Modeling

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Diamond inner region for thermal modeling

Diamond Inner Region for Thermal Modeling

Brian Maynard

April 30, 2010


Assumed material properties

Assumed Material Properties


Power dissipation for irradiated silicon input to ansys

Power dissipationfor irradiated silicon(input to ANSYS)

  • Power dissipation at 1e16 neq/cm2 ~122 mW/cm2 (from T. Affolder )

For annealed silicon, we simply multiply

the above function by 0.57 for an

operating voltage of 900V (T. Affolder)

It is assumed the silicon is annealed


Power distribution in chip

Power Distribution in Chip

Constant Pixel Power (CPP)

+1/R Digital Power section of chip (RDP)

Constant Digital Power (CDP)

(1/14th the area of the total chip)

The orange part of the chip (CDP) is situated such that

it is farthest away from the beam center

CPP + (7.5 mm*RDP)R-1 + CDP = Total Watts/Chip


Diamond inner region for thermal modeling

RDP=CPP=CDP=0.5W/chip

Half that was used on next slide


Diamond inner region for thermal modeling

RDP=CPP=CDP=0.5W/chip


Diamond inner region for thermal modeling

Sensor Layer

Silicon

Diamond


Diamond inner region for thermal modeling

RDP=CPP=CDP=0.5W/chip

with Diamond Inner Region


Diamond inner region for thermal modeling

RDP=CPP=CDP=1.5W/chip


Diamond inner region for thermal modeling

RDP=CPP=CDP=1.5W/chip

Diamond Inner Region


Summary

Summary

From a low power mode, the change in temperature is not that significant (~1C)

For high power modes the change is more dramatic (~6C)


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