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Kris Gaj

Kris Gaj. Research and teaching interests: cryptography computer arithmetic FPGA design and verification Contact: Engineering Bldg., room 3225 kgaj@gmu.edu (703) 993-1575. Office hours: Monday, 3:00-4:00 PM, Wednesday, 3:00-4:00 PM,

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Kris Gaj

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  1. Kris Gaj • Research and teaching interests: • cryptography • computer arithmetic • FPGA design and verification • Contact: • Engineering Bldg., room 3225 • kgaj@gmu.edu • (703) 993-1575 Office hours:Monday, 3:00-4:00 PM, Wednesday, 3:00-4:00 PM, 7:30-8:30 PM and by appointment

  2. ECE 645 Part of: MS in Computer Engineering Fundamental course for the specialization areas: Digital Systems Design Digital Signal Processing Elective course in the remaining specialization areas MS in Electrical Engineering Elective PhD in ECE, Computer Science, and IT Elective

  3. DIGITAL SYSTEMS DESIGN • Concentration advisors:Kris Gaj, Ken Hintz, Houman Homayoun • ECE 545 Digital System Design with VHDL– K. Gaj, project, FPGA design with VHDL, • 2. ECE 645 Computer Arithmetic– K. Gaj, project, FPGA design with VHDL or Verilog, software, or analytical • 3. ECE 681 VLSI Design for ASICs– H. Homayoun, project/lab, front-end and back-end ASIC design with Synopsys tools • 4. ECE 586 Digital Integrated Circuits – D. Ioannou, R. Mulpuri, • 5a. ECE 682 VLSI Test Concepts • – T. Storey • 5b. ECE 699 Digital Signals Processing Hardware Architectures– A. Cohen, project, FPGA design with VHDL and Matlab/Simulink

  4. DIGITAL SIGNAL PROCESSING • Concentration advisors: Aaron Cohen, Kris Gaj, Ken Hintz, Jill Nelson, • Kathleen Wage • ECE 535 Digital Signal Processing • – L. Griffiths, J. Nelson, Matlab • ECE 545 Digital System Design with VHDL– K. Gaj, project, FPGA design with VHDL • ECE 645 Computer Arithmetic– K. Gaj, project, FPGA design with VHDL • ECE 699 Digital Signals Processing Hardware Architectures– A. Cohen, project, FPGA design with VHDL and Matlab/Simulink • 5a. ECE 537 Introduction to Digital Image Processing • – K. Hintz • 5b. ECE 738 Advanced Digital Signal Processing • – K. Wage

  5. A few words about You 2 PhD ECE students 5 MS CpE students 5 MS EE students

  6. A few words about You 4 students who did not take ECE 545 8 students who took ECE 545 ECE 545 not enforced as a prerequisite

  7. Useful Knowledge (which can be used as a background for a project) • RTL design with VHDL or Verilog • FPGA Devices and Tools • High level programming language (e.g., C, Java, Matlab) • Basics of digital design and computer organization

  8. Course web page ECE web page  Courses  ECE 645 http://ece.gmu.edu/coursewebpages/ECE/ECE645/S14

  9. Computer Arithmetic Lecture Project Homework 15 % Midterm exam (in class) 20 % Final Exam (in class) 30 % Project 35%

  10. Bonus Points for Class Activity • Based on class exercises during lecture • “Small” points earned each week posted on BlackBoard • Up to 5 “big” bonus points • Scaled based on the performance of the best student For example: Small points Big points • 1. Alice 40 5 • Bob 36 4.5 • … … … • 12. Charlie 8 1

  11. Digital circuit design course covering Efficient • addition and subtraction • multiplication • division and modular reduction • exponentiation Integers unsigned and signed Real numbers • Elements • of the Galois • field GF(2n) • polynomial base • fixed point • single and double precision • floating point

  12. Lecture topics INTRODUCTION • Applications of computer arithmetic algorithms.

  13. ADDITION AND SUBTRACTION • Basic addition, subtraction, and counting • Addition in Xilinx and AlteraFPGAs • 3. Carry-lookahead, carry-select, and hybrid adders • 4. Adders based on Parallel Prefix Networks • Pipelined Adders • Modular Adders/Subtractors

  14. MULTIOPERAND ADDITION • Sequential multi-operand adders • Carry Save Adders • Wallace and Dadda Trees

  15. NUMBER REPRESENTATIONS • Unsigned Integers • Signed Integers • Fixed-point real numbers • Floating-point real numbers • Elements of the Galois Field GF(2n)

  16. MULTIPLICATION • Tree and array multipliers • Unsigned vs. signed multipliers • Optimizations for squaring • 4. Sequential multipliers • - radix-2 multiplier • - multipliers based on carry-save adders • - radix-4 & radix-8 multipliers • - Booth multipliers • - serial multipliers

  17. TECHNOLOGY • Embedded resources of Xilinx and AlteraFPGAs • - block memories • - multipliers • - DSP units • 2. Multiplication in Xilinx and AlteraFPGAs • - using distributed logic • - using embedded multipliers • - using DSP blocks • 3. Pipelined multipliers

  18. DIVISION Basic restoring and non-restoring sequential dividers Array dividers Dividers by Convergence SRT and high-radix dividers

  19. LONG INTEGER ARITHMETIC (PROJECTS) • Modular Multiplication • Modular Exponentiation • Montgomery Multipliers and Exponentiation Units

  20. FLOATING POINT AND GALOIS FIELD ARITHMETIC (PROJECTS) • Floating-point units • Binary formats • Decimal formats • 2. Galois Field GF(2n) units

  21. Literature (1) Required textbook: Behrooz Parhami, Computer Arithmetic: Algorithms and Hardware Design, 2nd edition, Oxford University Press, 2010.

  22. Literature (2) Supplemantory books: Jean-Pierre Deschamps, Gery Jean Antoine Bioul, Gustavo D. Sutter, Synthesis of Arithmetic Circuits: FPGA, ASIC and Embedded Systems, Wiley-Interscience, 2006. Joseph Cavanagh, Computer Arithmetic and Verilog HDL Fundamentals, CRC Press, 2009. Milos D. Ercegovac and Tomas Lang Digital Arithmetic, Morgan Kaufmann Publishers, 2004.

  23. Literature (3) Digital System Design textbooks: • Pong P. Chu, RTL Hardware Design Using VHDL: • Coding for Efficiency, Portability, and Scalability, • Wiley-IEEE Press, 2006 (ECE 545 textbook) • Hubert Kaeslin, Digital IntegratedCircuit Design: • From VLSI Architectures to CMOS Fabrication, • Cambridge University Press; 1st Edition, 2008. • (ECE 681 textbook) • 3. Stephen Brown and ZvonkoVranesic, • Fundamentals of Digital Logic with VHDL Design, • 3rd Edition, McGraw-Hill, 2008. (ECE 331 textbook)

  24. Literature (4) Supplementary books: • E. E. Swartzlander, Jr., Computer Arithmetic, • vols. I and II, IEEE Computer Society Press, 1990. • 2. Alfred J. Menezes, Paul C. van Oorschot, • and Scott A. Vanstone, • Handbook of Applied Cryptology, • Chapter 14, Efficient Implementation, • CRC Press, Inc.,1998.

  25. Literature (3) Proceedings of conferences ARITH - International Symposium on Computer Arithmetic ASIL - Asilomar Conference on Signals, Systems, and Computers ICCD - International Conference on Computer Design CHES - Workshop on Cryptographic Hardware and Embedded Systems Journals and periodicals IEEE Transactions on Computers, in particular special issues on computer arithmetic. IEEE Transactions on Circuits and Systems IEEE Transactions on Very Large Scale Integration IEE Proceedings: Computer and Digital Techniques Journal of Signal Processing Systems

  26. Homework • reading assignments • analysis of computer arithmetic algorithms • and implementations • design of small arithmetic units

  27. Getting Help Outside of Office Hours • System for asking questions 24/7 • Answers can be given by students and instructors • Student answers endorsed (or corrected) by instructors • Average response time in ECE 545 = 2.1 hour • You can submit your questions anonymously • You can ask private questions visible only to • the instructors

  28. Exams Midterm Exam - 2 hrs 30 minutes, in class multiple choice + short problems Final Exam – 2 hrs 45 minutes comprehensive conceptual questions analysis and design of arithmetic units Practice exams on the web Tentative days of exams: Midterm Exam - March 26 Final Exam - Wednesday, May 7, 4:30-7:15 PM

  29. Project • Can be done individually or in groups of two students • Suggested project topics posted early in the semester • You can propose your own project topic • Regular meetings with the instructor • Presentations at the end of the semester • Contest for the best project

  30. ECE 645 Project Software Hardware Analytical

  31. Hardware Projects • Real-life circuit requiring the use of arithmetic • operations • FPGA implementation using embedded resources, • such as DSP units and Block Memories • Options of FPGA tools, initial placement point, • and optimum target clock frequency selected • using ATHENa • Possible experimental testing using PLDA boards • with PCI Express interface based • on Virtex 6, Virtex 7, and Stratix V FPGAs (optional)

  32. Software Projects • Real-life application requiring the use of • arithmetic operations • Software implementation in a high-level • programming language of your choice • Possible use of arithmetic libraries, such as • GMP, MIRACL, RELIC, NTL • Optimization of software tool options

  33. Analytical Projects • Review of literature concerning algorithms • and hardware architectures for a specific • class of arithmetic operations • Qualitative comparison of competing designs • Quantitative comparison based on published • results

  34. Mixed Projects AN 20% AN 20% SW 40% HW 40% AN 60% HW 80% SW 40%

  35. Primary applications (1) Execution units of general purpose microprocessors Integer units Floating point units Integers (8, 16, 32, 64, 128 bits) Real numbers (32, 64, 128 bits)

  36. Primary applications (2) Digital signal and digital image processing e.g., digital filters Discrete Fourier Transform Discrete Hilbert Transform Edge detection General purpose DSP processors Specialized circuits Real or complex numbers (fixed-point or floating point)

  37. Primary applications (3) Coding Error detection codes Error correcting codes Elements of the Galois fields GF(2n) (4-64 bits)

  38. Secret-key (Symmetric) Cryptosystems key of Alice and Bob - KAB key of Alice and Bob - KAB Network Decryption Encryption Bob Alice

  39. Hash Function arbitrary length m message hash function h It is computationally infeasible to find such m and m’ that h(m)=h(m’) h(m) hash value fixed length

  40. Primary applications (4) Cryptography IDEA, RC6, Mars, SHA-3 candidates: SIMD, Shabal, Skein, BLAKE Twofish, Rijndael, SHA-3 candidates Elements of the Galois field GF(2n) (4, 8 bits) Integers (16, 32, 64 bits)

  41. Main operations Auxiliary operations 2 x SQR32, 2 x ROL32 XOR, ADD/SUB32 RC6 MARS XOR, ADD/SUB32 MUL32, 2 x ROL32, S-box 9x32 XOR ADD32 Twofish 96 S-box 4x4, 24 MUL GF(28) Rijndael 16 S-box 8x8 24 MUL GF(28) XOR 8 x 32 S-box 4x4 Serpent XOR

  42. Basic Operations of 14 SHA-3 Candidates NTT – Number Theoretic Transform, GF MUL – Galois Field multiplication, MUL – integer multiplication, mADDn – multioperand addition with n operands

  43. Public Key (Asymmetric) Cryptosystems Private key of Bob - kB Public key of Bob - KB Network Decryption Encryption Bob Alice

  44. RSA as a trap-door one-way function PUBLIC KEY C = f(M) = Me mod N M C M = f-1(C) = Cd mod N PRIVATE KEY N = P  Q P, Q - large prime numbers e  d  1 mod ((P-1)(Q-1))

  45. RSA keys PUBLIC KEY PRIVATE KEY { e, N } { d, P, Q } N = P  Q P, Q - large prime numbers e  d  1 mod ((P-1)(Q-1))

  46. Primary applications (5) Cryptography Public key cryptography Elliptic Curve Cryptosystems, Pairing Based Cryptosystems RSA, DSA, Diffie-Hellman Long integers (1k-16k bits) Elements of the Galois field GF(2n) (160-512 bits)

  47. Primary applications (5) Cipher Breaking Public key cryptography RSA PUBLIC KEY RSA PRIVATE KEY { e, N } { d, P, Q } N = P  Q P, Q e  d  1 mod ((P-1)(Q-1))

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