1 / 14

Modelling Self-Adaptive Networked Entities

Modelling Self-Adaptive Networked Entities. In Matlab/Simulink. R. Bartosinski, M. Dan ěk, P . Honz ík, J. Kadlec. Introduction. Self-Adaptive Networked Entity Partial Reconfiguration of Entity Implementing a SANE Network Mode l ling a SANE Network Data flow in a SANE network.

amal
Download Presentation

Modelling Self-Adaptive Networked Entities

An Image/Link below is provided (as is) to download presentation Download Policy: Content on the Website is provided to you AS IS for your information and personal use and may not be sold / licensed / shared on other websites without getting consent from its author. Content is provided to you AS IS for your information and personal use only. Download presentation by click this link. While downloading, if for some reason you are not able to download a presentation, the publisher may have deleted the file from their server. During download, if you can't get a presentation, the file might be deleted by the publisher.

E N D

Presentation Transcript


  1. Modelling Self-Adaptive Networked Entities In Matlab/Simulink R.Bartosinski, M.Daněk, P. Honzík, J. Kadlec

  2. Introduction • Self-Adaptive Networked Entity • Partial Reconfiguration of Entity • Implementing a SANE Network • Modelling a SANE Network • Data flow in a SANE network (c) 2007 by UTIA AV CR v.v.i

  3. Self-Adaptive Networked Entity • Computing Engine • Processing data • Observer • Monitoring computation process • Controller • Decisions regarding computation task • Communication Interface • Management of SANE assemblies (c) 2007 by UTIA AV CR v.v.i

  4. Reconfigurable FPGA - High Level View • SRAM-based FPGA devices • Generic logic • Easily reusable • Static part • Permanently working • Dynamic parts = Function plugins • Function can be changed • Can be stopped Configuration SRAM (c) 2007 by UTIA AV CR v.v.i

  5. Partial Reconfiguration of Entity • Dynamic part • Precompiled IP cores • Static part • Reconfiguration controller • Microcontroller • External bitstream memory (c) 2007 by UTIA AV CR v.v.i

  6. Implementing a SANE Network • Tagged data packets • Header = Operation • Data • SANE Elements • Dataflow processing • Network topology (c) 2007 by UTIA AV CR v.v.i

  7. Implementing a SANE Network • Four types of elements • Ring topology (c) 2007 by UTIA AV CR v.v.i

  8. Implementing a SANE Network • Input cutter • Divides input data stream into packets • SANE element • Processes packets with tags match its functionality • Output router • Directing processed and partially processed packets • Configuration master • Managing database of configuration bitstreams (c) 2007 by UTIA AV CR v.v.i

  9. Advance of modelling a SANE Network • Complete settings with signal scopes • Log data transfer in SANE network • Internal SANE configurations • Fast Simulink to FPGA transformation (c) 2007 by UTIA AV CR v.v.i

  10. Modelling a SANE Network • Simulink model with full signal scopes and log data transfers (c) 2007 by UTIA AV CR v.v.i

  11. Modelling a SANE Network (2) • Simplified model with Simulink/FPGA entity (c) 2007 by UTIA AV CR v.v.i

  12. Data flow in a SANE network (c) 2007 by UTIA AV CR v.v.i

  13. Conclusions • Platform for building novel systems • Platform based on self-adaptive elements • Increased design reuse • Decreased power consumption • Modelling in Matlab/Simulink (c) 2007 by UTIA AV CR v.v.i

  14. Acknowledgements • This work has been partially supported by: • Czech Ministry of Education Project No. 1M0567http://www.c-a-k.cz • European CommissionProject No. FP6-2004-IST-4-027611http://www.aether-ist.org (c) 2007 by UTIA AV CR v.v.i

More Related