Sidecar asic characterization dan pontillo
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SIDECAR ASIC Characterization Dan Pontillo PowerPoint PPT Presentation


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Background Developed by Teledyne Scientific & Imaging, LLC Designed to streamline normally bulky and power-hungry focal plane electronics which are used to control imaging sensors Generates the necessary clock signals and bias voltages while simultaneously digitizing imaging sensor outputs

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SIDECAR ASIC Characterization Dan Pontillo

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Sidecar asic characterization dan pontillo

  • Background

    • Developed by Teledyne Scientific & Imaging, LLC

    • Designed to streamline normally bulky and power-hungry focal plane electronics which are used to control imaging sensors

    • Generates the necessary clock signals and bias voltages while simultaneously digitizing imaging sensor outputs

    • Reduced size and mass of control electronics is crucial in space missions which have mass limits

    • Planned for use on the Hubble Space Telescope and the James Webb Telescope

    • Configuration for optimal performance demands a high level understanding of its operation and firmware design

  • Goals

    • Fully evaluation and characterization of ASIC chip

    • Efficient, optimized firmware

    • Specifications for optimal experimental setups

  • Plan

    • Obtain a baseline setup for minimal noise and processing

    • Measure standard digitization characteristics

    • Measure performance with respect to altered operational modes

    • Organize performance data and specifications into a datasheet

  • Results

    • Reduced read noise and improved image quality

    • Simplified firmware and optimized readout performance

SIDECAR ASIC CharacterizationDan Pontillo

ABOVE: Sidecar ASIC performance specification table

ABOVE: Sidecar ASIC. All signal conditioning, clock/bias generation and digitization hardware is self-contained in this small chip.

  • Testing

  • The Sidecar ASIC’s baseline performance must be measured and tested with respect to its various modes of operation, firmware settings and experimental setups.

  • The Sidecar’s firmware must also be pared down to a simple linear readout format, minimizing the amount of noise from signal conditioning and processing.

  • Once a baseline operational mode is achieved, the Sidecar is subjected to a battery of standard tests for digitization hardware and analog electronics.

  • These tests will be important in determining the optimal configuration for the SIDECAR for any given application. Thus allowing us to better control imaging sensors and optimizing their performance.

Setup A _ ASIC connected via Fiber boxes to PC with battery power

Setup B_ ASIC connected directly via USB to PC with battery power

ABOVE: Detector control electronics built by Astronomical Research Cameras, Inc. The SIDECAR has the same capability as this set of electronics.

ABOVE: SIDECAR read noise results from two distinct setups in an experiment to remove a noise pattern. In this experiment, one input channel on the SIDECAR was fed a 1V DC signal from a power supply. In SETUP A the ASIC was powered by an AC/DC converter via the USB cable. In SETUP B the SIDECAR is powered by the laptop battery via the USB cable. The noise difference in the two setups can be attributed to the power source for the ASIC. This is an example of the tests needed to be preformed to determine the optimal operation of the SIDECAR.

ABOVE: Block diagram of the SIDECAR ASIC

  • The SIDECAR ASIC: focal plane electronics on a single chip

    • Markus Looseet al.,     Proc. SPIE Int. Soc. Opt. Eng. 5904, 59040V (2005) (10 pages)


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