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The TI University Programme. 基于 TI MSP430 微控制器的 智能仪表课程设计 —— 上海交通大学施耐德实验室. www.ti.com Shanghai Jiaotong university. 课程目的: 培养学生调试模拟电路的能力 加强学生掌握数字电路的设计 引导学生运用 MSP430 进行电子作品的实现. 课程内容: 基于 MSP430 自动量程切换交直流电压表设计 基于 MSP430 温度采集和控制的设计 基于 MSP430 超声波距离测量的设计 基于 MSP430 简易多功能电子秤的设计 …….

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The ti university programme

The TIUniversity Programme

基于TI MSP430微控制器的

智能仪表课程设计

——上海交通大学施耐德实验室

www.ti.com

Shanghai Jiaotong university


Msp430

课程目的:培养学生调试模拟电路的能力加强学生掌握数字电路的设计引导学生运用MSP430进行电子作品的实现


Msp430 msp430 msp430 msp430

课程内容:基于MSP430自动量程切换交直流电压表设计基于MSP430温度采集和控制的设计基于MSP430超声波距离测量的设计基于MSP430简易多功能电子秤的设计……

鼓励学生进行创新的设计和制作

希望有更多个性化的作品!


The ti university programme

课程设计内容的简单介绍

1.自动量程切换的交直流电压表

同学可以自行选择制作电压表的量程:

(1)30mV, 300mV, 3V

(2)50mV, 500mV, 5V

直流电压测量的基本要求:

第一档位:增益 X100倍

第二档位:增益X10倍

第三档位:增益X1倍


1 3 2 3 vca810 4 pga

可能的设计方案:(1)利用多路开关设计3个增益运算放大器(2)利用数字电位计控制反馈增益(3)使用压控增益放大器VCA810(4)基于可编程增益放大器PGA


The ti university programme

作品的基本要求:(1)能完成在不同量程下自动切换(2)能测量交流信号的有效值(3)能测量交流信号的频率(范围10Hz~5kHz)(4)能测量芯片温度或者测量室温显示在LCD上(5)能实现交直流切换,尽可能降低芯片的功耗(6)最后测试单片机不能连接电脑


The ti university programme

部分学生的作品


The ti university programme

部分学生的作品

www.ti.com

Shanghai Jiaotong university


2 ds18b20 pt100 ect 103

2.温度采集与控制平台的设计温度测量的传感器可以有DS18B20数字温度传感器PT100电阻温度传感器ECT-103热敏电阻


The ti university programme

几种传感器的特点:

www.ti.com

Shanghai Jiaotong university


Pt100

总体设计方案之一:PT100

Pt100传感器

Pt100传感器

信号调理

信号调理

CPU

显示

图1 系统框图

PT100的阻值随着环境温度的变化而成正比例线性变化,在恒流激励的条件下,其两端的电压也成正比例线性变化。再通过信号调理电路对其输出的电压模拟量进行放大和滤波。中央处理器对输入的模拟量进行采样并通过软件滤波,然后将结果送至显示部分进行显示,显示时间间隔可通过键盘设置。


The ti university programme

系统组成原理图


The ti university programme

部分学生的作品

www.ti.com

Shanghai Jiaotong university


The ti university programme

部分学生的作品

www.ti.com

Shanghai Jiaotong university


The ti university programme

3.超声波距离的测量

使用超声波传感器为:TCT40-16FS

最大检测距离3米,适合液位和物位的检测,TCT40-16T是超声波的发射探头,其共振频率为40Khz。TCT40-16T产生的超声波强度与电压大小正相关


The ti university programme

超声波发射电路的设计

需要电平转换的驱动电路CD4049


The ti university programme

超声波接收电路的设计

接收电路的核心CX2016A是红外载波接收芯片


The ti university programme

部分学生的作品


The ti university programme

4.简易电子秤的设计

要求学生制作一个750个量程或者1kg量程的简易电子秤。

使用的器材是电阻应变压力传感器,仪表放大器和片外ADC芯片。


The ti university programme

可能的设计方案:

推荐的选型:

仪表放大器:INA333

ADC转换器:ADS1114

MSP430:G2553或F5529

LCD:12864或CMOS屏

按键:矩阵键盘


The ti university programme

可能的设计方案:

前级放大电路设计图


The ti university programme

可能的设计方案:

INA333典型应用电路


The ti university programme

可能的设计方案:

ADS1114典型应用电路


The ti university programme

需要完成的功能:

1.能分辨出1g的重量

4.自动计算总价格

2.有自动去皮的功能

5.重量稳定后自动变暗

3.能键盘输入价格

6.具有超重的保护和报警


The ti university programme

部分学生的作品的测试数据拟合


The ti university programme

部分学生的作品

摄于 2012TI 电子设计竞赛


The ti university programme

课程设计报告要求:

(1)简述课题任务和设计要求

(2)元器件选型的分析和说明

(3)设计方案的原理图和PCB图绘制

(4)整体设计系统的流程图

(5)软件设计的功能模块

(6)作品的检测数据结果及数据分析

(7)改进和拓展方案

(8)程序清单


Msp4301

下面进入MSP430的介绍


Agenda

Agenda

  • Introduction to Value Line

  • Code Composer Studio

  • CPUX and Basic Clock Module

  • Interrupt and GPIO

  • TimerA and WDT+

  • Low-Power Optimization

  • ADC10 and Comparator_A+

  • Serial Communications

  • Grace

  • Capacitive Touch Solution


Msp430 released devices

MSP430 Released Devices


The ti university programme

  • World’s Lowest Power MCU

  • Ultra-Low Power Active Mode

  • 7 Low Power Modes

  • Instant Wakeup

  • All MSP430 devices are Ultra-Low Power

  • Intelligent Analog & Digital Peripherals

  • Peripherals operate in low power modes

  • Minimize physical footprint and Bill of Materials

  • Featuring FRAM, USB, RF, Capacitive Touch I/O, Metrology Engines, LCD, ADC, DAC & MORE

  • Find the right MCU for you

  • 400+ devices

  • Up 256kB Flash, 18kB RAM, 25+ package options

  • Devices starting at $0.25 with Value Line

  • Various levels of performance & integration

  • Low cost and simple point of entry

  • Complete kits starting @ $4.30

  • GUI-based coding & debugging tools available

  • MSP430Ware Software and Resource Package

  • -Incl. code examples, datasheets, user guides & more!

MSP430 MCUsAn Introduction

Ultra-Low Power

Integration

Easy to Get Started

Extensive Portfolio, Low Cost Options


Msp430 enabled applications

MSP430-Enabled Applications

Utility Metering

Portable Medical

Electricity Meters

Gas Meters

Flow Meters

Smart Meters

Blood Glucose Meters

Thermometers

Heart-Rate Monitors

Implantable Devices

Thousands of applications are enabled by MSP430 MCUs

Differentiation is possible with MSP430 MCU’s Ultra-Low Power performance, high analog & digital peripheral integration, and easy-to-use tool chain.

Wireless Applications

Sensors & Security

Remote Sensors

Communication

Controllers

RFID

Smoke Detector

Motion Detector

Vibration Detector

Smart Sensors

Energy Harvesting

Consumer Electronics

Personal Health & Fitness

Renewable Energy

Battery-less devices

Solar, thermal,

vibration, etc

Portable Electronics

Remote Controls

Personal Care

PC peripherals

Sports Watches

Pedometers

Calorimeters

Dive watches


Value line 16 bit performance 8 bit price

Value Line: 16-bit performance, 8-bit price

ADC

ADC

ADC

ADC

ADC

ADC

ADC

ADC

ADC

ADC

ADC

ADC

UART

UART

UART

UART

UART

UART

UART

Cap Touch I/O

MSP430G25X3

16KB

ADC10

MSP430G24X3

SC

SC

SC

SC

SC

SC

SC

SC

SC

SC

SC

SC

8KB

Comparator

MSP430G24X2

SPI/I2C

MSP430G23X3

4KB

MSP430G23X2

MSP430G22X2

Flash Size

2KB

MSP430G22X3

MSP430G22X1*

MSP430G21X2

1KB

MSP430G21X1*

MSP430G21X3

.5 KB

MSP430G2001*

32-pin QFN

24 GPIO

16-pin

QFN

10 GPIO

28-pin

TSSOP

24 GPIO

20-pin

TSSOP/PDIP

16 GPIO

14-pin

TSSOP/PDIP

10 GPIO

* 8-pin SOIC in development


Value line peripherals

Value Line Peripherals


Value line peripherals1

Value Line Peripherals

  • General Purpose I/O

    • Independently programmable

    • Any combination of input, output, and interrupt (edge selectable) is possible

    • Read/write access to port-control registers is supported by all instructions

    • Each I/O has an individually programmable pull-up/pull-down resistor

    • Some parts/pins are touch-sense enabled (PinOsc)

  • 16-bit Timer_A3

    • 3 capture/compare registers

    • Extensive interrupt capabilities

  • WDT+ Watchdog Timer

    • Also available as an interval timer

  • Brownout Reset

    • Provides correct reset signal during power up and down

    • Power consumption included in baseline current draw


Value line peripherals2

Value Line Peripherals

  • Serial Communication

    • USI with I2C and SPI support

    • USCI with I2C, SPI and UART support

  • Comparator_A+

    • Inverting and non-inverting inputs

    • Selectable RC output filter

    • Output to Timer_A2 capture input

    • Interrupt capability

  • 8 Channel/10-bit 200 ksps SAR ADC

    • 8 external channels (device dependent)

    • Voltage and Internal temperature sensors

    • Programmable reference

    • Direct transfer controller send results to conversion memory without CPU intervention

    • Interrupt capable

    • Some parts have a slope converter


Launchpad development board

LaunchPad Development Board

USB EmulatorConnection

Embedded Emulation

6-pin eZ430 Connector

Crystal Pads

Chip Pinouts

Part and Socket

Power Connector

P1.3 Button

LEDs and Jumpers

P1.0 & P1.6

Reset Button


Agenda1

Agenda

  • Introduction to Value Line

  • Code Composer Studio

  • CPUX and Basic Clock Module

  • Interrupt and GPIO

  • TimerA and WDT+

  • Low-Power Optimization

  • ADC10 and Comparator_A+

  • Serial Communications

  • Grace

  • Capacitive Touch Solution


What is code composer studio

What is Code Composer Studio?

  • Integrated development environment for TI embedded processors

    • Includes debugger, compiler, editor, simulator, OS…

    • The IDE is built on the Eclipse open source software framework

    • Extended by TI to support device capabilities

  • CCSv5 is based on “off the shelf” Eclipse (version 3.7 in CCS 5.1)

    • Future CCS versions will use unmodified versions of Eclipse

      • TI contributes changes directly to the open source community

    • Drop in Eclipse plug-ins from other vendors or take TI tools and drop them into an existing Eclipse environment

    • Users can take advantage of all the latest improvements in Eclipse

  • Integrate additional tools

    • OS application development tools (Linux, Android…)

    • Code analysis, source control…

  • Linux support soon

  • Low cost! $445 or $495


Common tasks

Common Tasks

  • Creating New Projects

    • Very simple to create a new project for a device using a template

  • Build options

    • Many users have difficulty using the build options dialog and find it overwhelming

    • Updates to options are delivered via compiler releases and not dependent on CCS updates

  • Sharing projects

    • Easy for users to share projects, including working with version control (portable projects)

    • Setting up linked resources has been simplified


Workspaces and projects

Workspaces and Projects

Workspace

Project 1

Project 2

Project 3

Settings and preferences

Project

Source files

Header files

Library files

Build and tool settings

Source files

Code and Data

Project

Source files

Header Files

Library files

Build and tool settings

Project

Source files

Header Files

Library files

Build and tool settings

Link

Link

Link

Link

Header files

Declarations/Defines

Library files

Code and Data

A workspace contains your settings and preferences, as well as links to your projects. Deleting projects from the workspace deletes the links, not the files

A project contains your build and tool settings, as well as links to your input files. Deleting files from the workspace deletes the links, not the files


Project wizard

Project Wizard

  • Single page wizard for majority of users

    • Next button will show up if a template requires additional settings

  • Debugger setup included

    • If a specific device is selected, then user can also choose their connection, ccxml file will be created

  • Simple by default

    • Compiler version, endianness… are under advanced settings


Various ide options

Various IDE options

Free Integrated Development Environments (IDE) available

  • Code Composer Studio

  • Eclipse-based IDE (Compiler, debugger, linker, etc) for all TI embedded processors

  • Unrestricted version available for $495

  • Free versions are available!

    • Free 16kB code-limited version available for download

    • Free, full-featured, 120-day trial version available

  • IAR Embedded Workbench

  • Strong third-party IDE offering with project management tools and editor. Includes config files for all MSP430 devices.

  • Free versions are available!

    • Free 4/8/16kB code-limited Kickstart version available for download

    • Free, full-featured, 30-day trial version available

  • MSPGCC

  • Free, Open source, GCC tool chain for MSP430

  • includes the GNU C compiler (GCC), the assembler and linker (binutils), the debugger (GDB)

  • Tools can be used on Windows, Linux, BSD and most other flavors of Unix.

  • Learn more @ http://mspgcc.sourceforge.net/

Other MSP430 IDE options are available! Learn more @ www.ti.com/msp430tools


Lab1 code composer studio

Lab1: Code Composer Studio

  • Lab1:

    • Create a new workspace

    • Create Lab1 Project

    • Add in temperature sense demo

    • Compile it and run


Step 1 create ccs workspace

Step 1: Create CCS workspace

Put the Lab files onto your desktop

Launch CCS v5 Core Edition

Select a “Workspace” location

45


Step 2 create a ccs project

Step 2: Create a CCS Project

File > New > CCS Project

Project Name: Lab1

Device>Family: MSP430

Variant: MSP430G2452

Project templates and examples

: Empty Project

46


Step 3 add a file to the ccs project

Step 3: Add a File to the CCS Project

Project > Add Files

Navigate to Lab source folder

And select : Temperature_Sense_Demo.c

47


Ccs window c c perspective overview

CCS Window – C/C++ Perspective Overview

Independent Debug and C/C++ Project Perspectives

1-click project Debug

  • Project Outline

  • Shortcut to project parts

  • Project View

  • List of all Projects

  • Problems View

  • Information, Warnings, Errors

  • Console

  • Build Information

  • Code Window

  • Real-time breakpoints, Syntax highlighting

48


Ccs window debug perspective overview

CCS Window – Debug Perspective Overview

Independent Debug and C/C++ Project Perspectives

1-click project Debug

  • Highly configurablewindow layout

  • User preferences

  • Plugin support

  • Target control

  • Start

  • Stop

  • Halt

  • Stepping

  • Stack Trace

  • Real-time, in-system MSP430 information

  • Register access

  • Flash, RAM, Info segment access

  • Disassembly view

Program Size Info

  • Code Window

  • Real-time breakpoints, Syntax highlighting

49


Step 4 build debug a ccs project

Step 4: Build & Debug a CCS Project

Click the “BUG” to build the

code & launch the debugger

50


Step 5 run terminate a ccs project

Step 5: Run, Terminate a CCS Project

“RUN”

Perspectives

“TERMINATE”

51


Agenda2

Agenda

  • Introduction to Value Line

  • Code Composer Studio

  • CPUX and Basic Clock Module

  • Interrupt and GPIO

  • TimerA and WDT+

  • Low-Power Optimization

  • ADC10 and Comparator_A+

  • Serial Communications

  • Grace

  • Capacitive Touch Solution


Msp430g2xx structure

MSP430G2xx Structure

Ultra-low Power

  • 0.1uA power down

  • 0.8uA standby mode

  • 220uA / 1MIPS

  • <1us clock start-up

  • <50nA port leakage

  • Zero-power brown-out reset (BOR)

    Ultra-Flexible

  • 0.5k-16kB In-System Programmable (ISP) Flash

  • 16-bit Timer

  • SPI, I2C

  • 10bit ADC

  • Embedded emulation

Clock

FLASH

RAM

. . .

MAB 16

RISC

CPU

16-bit

JTAG/Debug

MDB 16

. . .

ACLK

Digital

Analog

Peripheral

Peripheral

SMCLK

6


16 bit risc cpu

Deep single-cycle register file

4 special purpose

12 general purpose

No accumulator bottleneck

RISC architecture

27 core instructions

24 emulated instructions

7 address modes

Atomic memory-to-memory addressing

Bit, byte and word processing

Constant generator

16-bit RISC CPU

7


Memory map

Memory Map

G2452 shown

  • Flash programmable via JTAG or In-System (ISP)

  • ISP down to 2.2V. Single-byte or Word

  • Main memory: 512 byte segments (0-n). Erasable individually or all

  • Information memory: 64 byte segments (A-D)

    • Section A contains device-specific calibration data and is lockable

  • Programmable Flash Memory Timing Generator

0FFFFh0FFE0h

FFDFh0E00h

010FFh01000h

02FFh0200h

01FFh0100h

0FFh010h

0Fh0h


Clock system

Clock System

On PUC, MCLK and SMCLK are sourced from DCOCLK at ~1.1 MHz. ACLK is sourced from LFXT1CLK in LF mode with an internal load capacitance of 6pF.

  • Very Low Power/Low Frequency Oscillator (VLO)

    • 4 – 20kHz (typical 12kHz)

    • 500nA standby

    • 0.5%/°C and 4%/Volt drift

  • Crystal oscillator (LFXT1)

    • Programmable capacitors

    • Failsafe OSC_Fault

    • Minimum pulse filter

  • Digitally Controlled Oscillator (DCO)

    • 0-to-16MHz

    • + 3% tolerance

    • Factory calibration in Flash


G2xxx no crystal required dco

G2xxx - No Crystal Required DCO

// Setting the DCO to 1MHzif (CALBC1_1MHZ ==0xFF || CALDCO_1MHZ == 0xFF)

while(1); // Erased calibration data? Trap!

BCSCTL1 = CALBC1_1MHZ; // Set range

DCOCTL = CALDCO_1MHZ; // Set DCO step + modulation

  • G2xx1 devices have 1MHz DCO constants only. Higher frequencies must be manually calibrated

  • G2xx2 & G2xx3 have all 4 constants + calibration values for the ADC & temperature sensor


Run time calibration of the vlo

Run Time Calibration of the VLO

Calibrate the VLO during runtime

Clock Timer_A runs on calibrated 1MHz DCO

Capture with rising edge of ACLK/8 from VLO

fVLO = 8MHz/Counts

Code library on the web (SLAA340)


System mclk vcc

System MCLK & Vcc

  • Match needed clock speed with required Vcc to achieve the lowest power

  • External LDO regulator required

  • Unreliable execution results if Vcc < the minimum required for the selected frequency

  • All G2xxx device operate up to 16MHz


Lab2 basic clock configure

Lab2: Basic Clock Configure

  • Lab2

    • Import Lab2 project to Workspace

    • Setup DCO = 1MHz

    • Use DCO/8 as MCLK, LED Blink

    • Use VLO/8 as MCLK, LED Blink


Lab 2

Lab 2:

// Configure Basic Clock

BCSCTL1 = __________; // Set range

DCOCTL = ___________;// Set DCO step + modulation

BCSCTL3 |= LFXT1S_2;// Set LFXT1

  • Reference User’s Guide, Datasheet & Schematic

// Configure MCLK

BCSCTL2 |= ________ + DIVM_3; // Set MCLK


Lab 2 bcsctl2 in 2xx user guide

Lab 2: BCSCTL2 in 2xx User Guide


Lab 2 bcsctl2 in msp430g2453 head file

Lab 2: BCSCTL2 in MSP430G2453 head file


Agenda3

Agenda

  • Introduction to Value Line

  • Code Composer Studio

  • CPUX and Basic Clock Module

  • Interrupt and GPIO

  • TimerA and WDT+

  • Low-Power Optimization

  • ADC10 and Comparator_A+

  • Serial Communications

  • Grace

  • Capacitive Touch Solution


Interrupts and the stack

Interrupts and the Stack

Entering Interrupts

Any currently executing instruction is completed

The PC, which points to the next instruction, is pushed onto the stack

The SR is pushed onto the stack

The interrupt with the highest priority is selected

The interrupt request flag resets automatically on single-source flags; Multiple source flags remain set for servicing by software

The SR is cleared; This terminates any low-power mode; Because the GIE bit is cleared, further interrupts are disabled

The content of the interrupt vector is loaded into the PC; the program continues with the interrupt service routine at that address


Vector table

Vector Table


Isr coding

ISR Coding

#pragma vector=WDT_VECTOR

__interrupt void WDT_ISR(void)

{

IE1 &= ~WDTIE; // disable interrupt

IFG1 &= ~WDTIFG; // clear interrupt flag

WDTCTL = WDTPW + WDTHOLD; // put WDT back in hold state

BUTTON_IE |= BUTTON; // Debouncing complete

}

#pragma vector - the following function is an ISR for the listed vector

_interrupt void - identifies ISR name

No special return required


Controlling gpio ports

Controlling GPIO Ports

Input Register PxIN

Output Register PxOUT

Direction Register PxDIR

Function Select PxREN

Function Select PxSEL

Function Select PxSEL2

Interrupt Edge PxIES

For GPIO Int

Interrupt Enable PxIE

Interrupt Flags PxIFG

GPIO Register

GPIO Code Example

P1DIR |= BIT4;

P1SEL |= BIT4;

P1DIR |= BIT0;

P1OUT |= BIT0;

26


Pin muxing

Pin Muxing

Each pin has multiple functions

Register bits select pin function

See device specific datasheet


Lab3 gpio

Lab3: GPIO

  • Lab3

    • Setup P1.3 to Button

    • Setup P1.0 to LED control

    • LED toggle with Button


Lab 3

Lab 3:

P1DIR |= BIT0; // Set P1.0 to output direction

P1IES |= BIT3; // P1.3 Hi/lo edge

_____ &= ~BIT3; // P1.3 IFG cleared

_____ |= BIT3; // P1.3 interrupt

// Port1 interrupt service routine

#pragma vector = __________

__interrupt void Port_1(void)

// Port1 interrupt service routine

P1OUT ^= BIT0; // P1.0 = toggle

______ &= ~BIT3; // P1.3 IFG cleared


Agenda4

Agenda

  • Introduction to Value Line

  • Code Composer Studio

  • CPUX and Basic Clock Module

  • Interrupt and GPIO

  • TimerA and WDT+

  • Low-Power Optimization

  • ADC10 and Comparator_A+

  • Serial Communications

  • Grace

  • Capacitive Touch Solution


Timer a

Timer_A

  • Asynchronous16-Bit timer/counter

  • Continuous,up-down,up count modes

  • Multiple capture/compare registers

  • PWM outputs

  • Interrupt vectorregister for fastdecoding

  • Can trigger DMA transfer

  • On all MSP430s

70


Timer a counting modes

Timer_A Counting Modes

Stop/Halt

Timer is halted

Continuous

Timer continuously counts up

0FFFFh

0h

Up

Timer counts between 0 and CCR0

Up/Down

Timer counts between 0 and CCR0 and 0

0FFFFh

CCR0

0h

CCR – Count Compare Register

71


Timer a interrupts

Timer_A Interrupts

TACCR0 CCIFG

The Timer_A Capture/Comparison Register 0 Interrupt Flag (TACCR0) generates a single interrupt vector:

TIMERA0_VECTOR

No handler required

TACCR1, 2 and TA interrupt flags are prioritized and combined using the Timer_A Interrupt Vector Register (TAIV) into anotherinterrupt vector

TACCR1 CCIFG

TACCR2 CCIFG

TAIV

TIMERA1_VECTOR

TAIFG

Your code must contain a handler to determine which Timer_A1 interrupt triggered

72


Taiv handler example

TAIV Handler Example

0

x

x

x

0

0

0

x

0

0

0

0

0

0

0

0

Source TAIV Contents

No interrupt pending 0

TACCR1 CCIFG02h

TACCR2 CCIFG 04h

Reserved06h

Reserved 08h

TAIFG0Ah

Reserved0Ch

Reserved0Eh

TAIV

15

0

#pragma vector = TIMERA1_VECTOR

__interrupt void TIMERA1_ISR(void)

{

switch(__even_in_range(TAIV,10))

{

case 2 : // TACCR1 CCIFG

P1OUT ^= 0x04; break;

case 4 : // TACCR2 CCIFG

P1OUT ^= 0x02; break;

case 10 : // TAIFG

P1OUT ^= 0x01; break;

}

}

0xF814 add.w &TAIV,PC

0xF818 reti

0xF81A jmp 0xF824

0xF81C jmp 0xF82A

0xF81E reti

0xF820 reti

0xF822 jmp 0xF830

0xF824 xor.b #0x4,&P1OUT

0xF828 reti

0xF82A xor.b #0x2,&P1OUT

0xF82E reti

0xF830 xor.b #0x1,&P1OUT

0xF834 reti

Assembly code

IAR C code

73


Timer a pwm example

Timer_A PWM Example

CCR2

CCR2

CCR2

MSP430F11x1

TEST

TA2/P1.7

P1.6

Vcc

P1.5

P2.5

P1.4

Vss

P1.3

XOUT

TA1/P1.2

XIN

P1.1

CCR1

CCR1

CCR1

RST

P1.0

P2.0

P2.4

P2.1

P2.3

CCR0

CCR0

CCR0

P2.2

  • Completely automatic

  • Independent frequencies with different duty cycles can be generated for each CCR

  • Code examples on the MSP430 website

74


Direct hardware control with timer a

Direct Hardware Control With Timer_A

TAR

65536

TACCR1 = 557

0

Example: ADC12

2s

TAIFG:Reference & ADC on

17ms

TACCR1:Ref delay / ADC trigger

ADC12IFG: Process ADC result Ref/ADC Off

CPU Active Mode

UART ...

75


Wdt module overview

WDT+ Module: Overview

  • Found on all MSP430 devices

  • Two modes

    • Watchdog

    • Interval timer

  • Access password protected

  • Separate interrupt vectors for POR and interval timer

  • Sourced by ACLK or SMCLK

  • Controls RST/NMI pin mode

  • WDT+ adds failsafe/protected clock


Watchdog timer failsafe operation

Watchdog Timer Failsafe Operation

If ACLK / SMCLK fail, clock source = MCLK(WDT+ fail safe feature)

If MCLK is sourced from a crystal, and the crystal fails, MCLK = DCO(XTAL fail safe feature)

WDT clock source …


Wdt common design issues

WDT: Common Design Issues

  • Program keeps resetting itself!

  • Program acting wacky – how did execution get to that place?

    • Try setting interrupt near beginning of main() to see if code is re-starting

  • CPU seems to freeze before even getting to first instruction

    • Is this a C program with a lot of initialized memory?

    • Generally can occur only with very large-memory versions of the device

    • Solution: Use __low_level_init() function, stop watchdog there

void main(void)

{

WDTCTL = WDTPW+WDTHOLD; // Stop the dog

.

.

}


Wdt interval timer function

WDT: Interval Timer Function

  • No PUC issued when interval is reached

  • If WDTIE and GIE set when interval is reached, a WDT interval interrupt generated instead of reset interrupt

  • Selectable intervals


Lab4 timer and interrupts

Lab4: Timer and Interrupts

  • Lab4

  • Use TimerA to implement Lab2

  • Configure Timer_A3 Count Cycle: 5100

  • Occurs a interrupt when TAR =100


Lab 4

Lab 4:

// Configure TimerA

TACTL = __________________; // Source: ACLK, UP mode

CCR0 = 5100; //Timer count 5100

CCR1 = 100; //Timer count 100

CCTL0 = CCIE; //CCR0 interrupt enabled

CCTL1 = CCIE; //CCR1 interrupt enabled

// Timer A0 interrupt service routine

#pragma vector = __________

__interrupt void Timer_A0(void)

// Timer A1 interrupt service routine

#pragma vector = __________

__interrupt void Timer_A1(void)


Agenda5

Agenda

  • Introduction to Value Line

  • Code Composer Studio

  • CPUX and Basic Clock Module

  • Interrupt and GPIO

  • TimerA and WDT+

  • Low-Power Optimization

  • ADC10 and Comparator_A+

  • Serial Communications

  • Grace

  • Capacitive Touch Solution


Ultra low power feature

Ultra Low Power Feature


Ultra low power is in our dna

Ultra-Low Power Is In Our DNA

MSP430 designed for ULP from ground up

Peripherals optimized to reduce power and minimize CPU usage

Intelligent, low power peripherals can operate independently of CPU and let the system stay in a lower power mode longerwww.ti.com/ulp

  • Multiple operating modes

    • 100 nA power down (RAM retained)

    • 0.3 µA standby

    • 110 µA / MIPS from RAM

    • 220 µA / MIPS from Flash

  • Instant-on stable high-speed clock

  • 1.8 - 3.6V single-supply operation

  • Zero-power, always-on BOR

  • <50nA pin leakage

  • CPU that minimizes cycles per task

  • Low-power intelligent peripherals

    • ADC that automatically transfers data

    • Timers that consume negligible power

    • 100 nA analog comparators

  • Performance over required operating conditions


Ultra low power activity profile

Ultra-Low Power Activity Profile

Minimize active time

Maximize time in Low Power Modes

Interrupt driven performance on-demand with <1μs wakeup time

Always-On, Zero-Power Brownout Reset (BOR)

Average

Active

Low Power Mode


Msp430 low power modes

MSP430 Low Power Modes

Off

All

Clocks Off

100nA

CPU Off

DCO on

ACLK on

45µA

Active

DCO on

ACLK on

220µA

<1µs

LPM0

LPM4

  • RAM/SFR retained

<1µs

BOR is

enabled in

all modes

Stand-by

DCO off

ACLK on

0.3µA

LPM3

  • RTC function

  • LCD driver

  • RAM/SFR retained

Specific values vary by device


Low power mode configuration

Low Power Mode Configuration

OSC

OFF

CPU

OFF

Reserved

SCG1

SCG0

V

GIE

N

Z

C

R2/SR

Active Mode 0 0 0 0 ~ 250uA

LPM0 0 0 0 1 ~ 35uA

LPM3 1 1 0 1 ~ 0.8uA

LPM4 1 1 1 1 ~ 0.1uA

bis.w #CPUOFF,SR ; LPM0

LPM in Assembly

34


Low power modes in stack

Low Power Modes In Stack

ORG 0F000h

RESET mov.w #300h,SP

mov.w #WDT_MDLY_32,&WDTCTL

bis.b #WDTIE,&IE1

bis.b #01h,&P1DIR

Mainloop bis.w #CPUOFF+GIE,SR

xor.b #01h,&P1OUT

jmp Mainloop

WDT_ISR bic.w #CPUOFF,0(SP)

reti

ORG 0FFFEh

DW RESET

ORG 0FFF4h

DW WDT_ISR

Item1

SP

Item2

Item1

Item2

PC

SP

SR=0018

Item1

Item2

PC

SR=0008

Item1

SP

Item2

PC

SR

LPM in C

35


Ulp is easy

ULP is Easy!

void main(void)

{

WDT_init(); // initialize Watchdog Timer

while(1)

{

__bis_SR_register(LPM3_bits + GIE);// Enter LPM3, enable interrupts

activeMode(); // in active mode. Do stuff!

}

}

#pragma vector=WDT_VECTOR

__interrupt void watchdog_timer (void)

{

__bic_SR_register_on_exit(LPM3_bits); // Clear LPM3 bits from 0(SR), Leave LPM3, enter active mode

}

Using our Low Power Modes are easy


10 yr embedded real time clock

10-yr Embedded Real-Time Clock

= LPM3 + RTC_Function

0.80µA + 250µA *100µs

1000000µs

0.80µA + 0.030µA = 0.83µA

// Partial RTC_Function

incrementseconds();

incrementminutes();

incrementhours();

//

1mA

100µA

10µA

1µA

Time


Low power operation

Low-Power Operation

Power-efficient MSP430 apps:

Minimize instantaneous current draw

Maximize time spent in low power modes

The MSP430 is inherently low-power, but your design has a big impact on power efficiency

Proper low-power design techniques make the difference

“Instant on” clock


Move software functions to peripherals

Move Software Functions to Peripherals

MCU

P1.2

// Endless Loop

for (;;)

{

P1OUT |= 0x04; // Set

delay1();

P1OUT &= ~0x04; // Reset

delay2();

}

// Setup output unit

CCTL1 = OUTMOD0_1;

_BIS_SR(CPUOFF);

100% CPU Load

Zero CPU Load

47


Power manage internal peripherals

Power Manage Internal Peripherals

Comparator_A

P1OUT |= 0x02; // Power divider

CACTL1 = CARSEL + CAREF_2 + CAON; // Comp_A on

if (CAOUT & CACTL2)

P1OUT |= 0x01; // Fault

else

P1OUT &= ~0x01;

P1OUT &= ~0x02; // de-power divider

CACTL1 = 0; // Disable Comp_A

48


Power manage external devices

Power Manage External Devices

Op-amp with shutdown can be 20x lower total power

0.01uA = Shutdown

20uA = Active

---------------------------

0.06uA = Average

1uA = Quiescent

1uA = Active

-----------------------

1uA = Average

49


Unused pin termination

Unused Pin Termination

Digital input pins subject toshoot-through current

Input voltages between VIL and VIH cause shoot-through if input is allowed to “float” (left unconnected)

Port I/Os should

Driven as outputs

Be driven to Vcc or ground by an external device

Have a pull-up/down resistor


Lab5 low power mode

Lab5: Low Power Mode

  • Lab5

  • Optimize Lab4 to implement LPM


Lab 5

Lab 5:

Enter Low Power Modes with just 1 line of code!

_BIS_SR(_________);//Enter Low Power Mode;


Agenda6

Agenda

  • Introduction to Value Line

  • Code Composer Studio

  • CPUX and Basic Clock Module

  • Interrupt and GPIO

  • TimerA and WDT+

  • Low-Power Optimization

  • ADC10 and Comparator_A+

  • Serial Communications

  • Grace

  • Capacitive Touch Solution


Fast flexible adc10

Fast Flexible ADC10

DirectTransferController

DataTransferController

  • 10-bit 8 channel SAR ADC

    • 6 external channels

    • Vcc and internal temperature

  • 200 ksps+

  • Selectable conversion clock

  • Autoscan

    • Single

    • Sequence

    • Repeat-single

    • Repeat-sequence

  • Internal or External reference

  • Timer-A triggers

  • Interrupt capable

  • Data Transfer Controller (DTC)

  • Auto power-down


Sample timing

Sample Timing

  • Reference must settle for <30uS

  • Selectable hold time

  • 13 clock conversion process

  • Selectable clock source

    • ADC10OSC (~5MHz)

    • ACLK

    • MCLK

    • SMCLK


Autoscan dtc performance boost

Autoscan + DTC Performance Boost

Data2

Data1

Data0

Data2

AUTO

ADC

DTC

// Software

Res[pRes++] = ADC10MEM;

ADC10CTL0 &= ~ENC;

if (pRes < NR_CONV)

{

CurrINCH++;

if (CurrINCH == 3)

CurrINCH = 0;

ADC10CTL1 &= ~INCH_3;

ADC10CTL1 |= CurrINCH;

ADC10CTL0 |= ENC+ADC10SC;

}

// Autoscan + DTC

_BIS_SR(CPUOFF);

Fully Automatic

70 Cycles / Sample


Comparator a

Comparator_A

  • References usable internally and externally

  • Low-pass filter selectable by software

  • Input terminal multiplexer

  • One interrupt vector with enable


Comparator based slope adc

Comparator-Based Slope ADC

  • 10-bit+ accuracy

  • Resistive sensors

  • Very low cost

  • App note SLAA038

V

CAREF

t_x = R_x x C x ln

Vcc

. . .

t_NTC

R_NTC =

10k x

t_10k


Example thermistor

RREF = 10K, RM = NTC

VCAREF = VCC*e(-t/RC)

Relationship simplifies to single multiply & divide operations

Example: Thermistor

t_NTC

V

CAREF

C x ln

t_NTC

Vcc

R_NTC

R_NTC =

10k x

=

t_10k

t_10k

10k

V

CAREF

C x ln

Vcc


Timer triggers low power

Timer Triggers – Low-Power

Timer

Memory

ADC

// Interrupt CPU cycles

; MSP430 ISR to start conversion 6

BIS #ADC12SC,&ADC12CTL0 ; Start conversion 5

RETI ; Return 5

; 16

Timer triggered interrupts – no software wait loops

64


Selecting an msp430 adc

Selecting an MSP430 ADC

  • Voltage range to be measured?

  • Max frequency for AIN?

  • How much resolution?

  • Differential inputs?

  • Reference range?

  • Multiple channels?


Lab6 adc10

Lab6: ADC10

  • Measure internal temperature

  • Additional CCS features


Lab 6

Lab 6:

//Configure ADC10

// Choose ADC Channel as Temp Sensor

ADC10CTL1 = _______ + ADC10DIV_3;

//Choose ADC Ref sourceCCTL1

ADC10CTL0 = _______ + ADC10SHT_3 + REFON + ADC10ON +ADC10IE;


Agenda7

Agenda

  • Introduction to Value Line

  • Code Composer Studio

  • CPUX and Basic Clock Module

  • Interrupt and GPIO

  • TimerA and WDT+

  • Low-Power Optimization

  • ADC10 and Comparator_A+

  • Serial Communications

  • Grace

  • Capacitive Touch Solution


The ti university programme

USI

  • MSP430G2xx1/2devices

  • Variable length shift register

  • Supports I2C

    • START/STOP detection

    • SCL held after START

    • SCL held after counter overflow

    • Arbitration lost detection

  • Supports SPI

    • 8/16-bit Shift Register

    • MSB/LSB first

  • Flexible Clocking

  • Interrupt Driven

83


Usi for data i o

Data shift register: up to 16 bits supported

Number of bits transmitted and received is controlled by a bit counter

Transmit and Receive is simultaneous

Data I/O is user-defined: MSB or LSB first

Bit counter automatically stops clocking after last bit & sets flag

No data buffering needed

USI for Data I/O

84


Usi reduces cpu load for spi

USI Reduces CPU Load for SPI

  • I2C Slave has as little as 4us from clock edge to data

  • Traditional software-only solution allows time for little else

  • USI hardware enables practical and compliant I2C

  • Code on MSP430 website

//Shift16_inout_Software

SR = DATA;

for (CNT=0x10;CNT>0;CNT--)

{

P2OUT &= ~SDO;

if (SR & 0x8000)

P2OUT |= SDO;

SR = SR << 1;

if (P2IN & SDIN)

SR |= 0x01;

P2OUT |= SCLK;

P2OUT &= ~SCLK;

}

// Shift16_inout_USI

USISR |= DATA;

USICNT |= 0x10;

10 Cycles

425 Cycles

85


The ti university programme

USCI

  • Designed for Ultra-Low Power:

    • Auto-Start from any Low-Power Mode

  • Two Individual Blocks:

    • USCI_A: UART or SPI

    • USCI_B: SPI or I2C

  • Double Buffered TX/RX

  • Baudrate/Bit Clock Generator:

    • Auto-Baud Rate Detect

    • Flexible Clock Source

  • RX glitch suppression

  • DMA enabled

  • Error Detection

Recommended USCI initialization/re-configuration process is shown in your workbook.

88


Usci enhanced features

USCI Enhanced Features

  • New standard MSP430 serial interface

  • Auto clock start from any LPMx

  • Two independent communication blocks

  • Asynchronous communication modes

    • UART standard and multiprocessor protocols

    • UART with automatic Baud rate detection (LIN support)

    • Two modulators support n/16 bit timing

    • IrDA bit shaping encoder and decoder

  • Synchronous communication modes

    • SPI (Master & Slave modes, 3 & 4 wire)

    • I2C (Master & Slave modes)

89


Usci baudrate generator

USCI Baudrate Generator

  • Oversampling Baud Rate Generation

  • Two Modulators:

    • UCBRSx and UCBRFx select modulation pattern

  • RX sampled using BITCLK16

90


Value line communication modules

Value Line Communication Modules

USI

USCI

UART

SPI

I2C

82


Low overhead uart implementation

Low-Overhead UART Implementation

  • 100% hardware bit latching and output

  • Full speed from LPM3 and LPM4

  • Low CPU Overhead

  • App Note SLAA078 on web

76


Software uart implementation

Software UART Implementation

  • A simple UART implementation, using the Capture & Compare features of the Timer to emulate the UART communication

  • Half-duplex and relatively low baud rate (9600 baud recommended limit), but 2400 baud in our code (1 MHz DCO and no crystal)

  • Bit-time (how many clock ticks one baud is) is calculated based on the timer clock & the baud rate

  • One CCR register is set up to TX in Timer Compare mode, toggling based on whether the corresponding bit is 0 or 1

  • The other CCR register is set up to RX in Timer Capture mode, similar principle

  • The functions are set up to TX or RX a single byte (8-bit) appended by the start bit & stop bit

Application note: http://focus.ti.com/lit/an/slaa078a/slaa078a.pdf


Agenda8

Agenda

  • Introduction to Value Line

  • Code Composer Studio

  • CPUX and Basic Clock Module

  • Interrupt and GPIO

  • TimerA and WDT+

  • Low-Power Optimization

  • ADC10 and Comparator_A+

  • Serial Communications

  • Grace

  • Capacitive Touch Solution


The ti university programme

Grace™

A free, graphical user interface that generates source code and eliminates manual peripheral configuration

GraceTM


Visually enable configure msp430 peripherals

Visually Enable & Configure MSP430 Peripherals

Developers can interface with buttons, drop downs, and text fields to effortlessly navigate high above low-level register settings

Grace generates fully commented C code for all F2xx and G2xx Value Line Microcontrollers from MSP430


What is grace

What is Grace?

Grace – Graphical Code Engine

Is:

Generates MSP430 peripheral initialization code in CCSv4

Enable a new user to have running program in 15 minutes

Heavy emphasis on ease of use

Currently in “Public Beta” stage

Will extend to cover all MCU devices

Is not:

Graphical application builder

01/26/2011

TI Confidential – NDA Restrictions

125


Project structure and build flow

Project Structure and Build Flow

Application

C/C++Source Files

“xxxxx.cfg”

This is the device peripheral configuration file and is edited with the graphical Grace view.

“src” Folder

Automatically generated inside the “Debug” or “Release” folder. Contains MSP430 C-code that initializes all configured peripherals.

Final Executable

MSP430 Output File

Linker

C/C++ Compiler

01/26/2011

TI Confidential – NDA Restrictions

126


User code skeleton example

User Code Skeleton Example

/*

* ======== Standard MSP430 includes ========

*/

#include <msp430.h>

/*

* ======== Grace related includes ========

*/

#include <ti/mcu/msp430/csl/CSL.h>

/*

* ======== main ========

*/

int main(int argc, char *argv[])

{

// Activate Grace-generated configuration

CSL_init();

__enable_interrupt(); // Set GIE

// >>>>> Fill-in user code here <<<<<

return (0);

}

You know this one…

Master include file for all Grace-related content

Performs all Grace-configured peripheral setup

User code from here…

01/26/2011

TI Confidential – NDA Restrictions

127


Grace adding a peripheral

Grace – Adding a Peripheral

Right-click on the peripheral and select “Use”

All blocks shaded blue can be configured

01/26/2011

TI Confidential – NDA Restrictions

128


How to tell a peripheral is added

How to tell a peripheral is added?

Look at the bottom left corner of the peripheral on the CSL view, it will show a checkmark if the peripheral is initialized.

01/26/2011

TI Confidential – NDA Restrictions

129


Grace navigation

Grace – Navigation

Left-click on a peripheral to navigate to its detail view

Use home button to go back to the top-level device view

Forward/backward buttons are available as well

01/26/2011

TI Confidential – NDA Restrictions

130


Grace configuring a peripheral

Grace – Configuring a Peripheral

Each peripheral has 4 different representations:“Overview,”“Basic User”,“Power User”,“Registers”

You can edit anyof the them, theyare all connected

Validate thecurrent config byclicking “Refresh”

01/26/2011

TI Confidential – NDA Restrictions

131


Grace removing a peripheral

Grace – Removing a Peripheral

Right-click on the peripheral and select “Stop Using”

01/26/2011

TI Confidential – NDA Restrictions

132


Lab8 grace

Lab8: Grace

  • Use Grace to configure all the required peripherals

  • To do Lab3 again

  • Enter LPM4


Lab 8 step by step

Lab 8: step by step

Disable the Watchdog timer

Configure the DCO to run off the internal pre-calibrated 8MHz constants

Setup the LaunchPad’s S2 button for interrupt operation

Enter LPM4 in the main() function

Provide a button interrupt handler that clears the IFGs and wakes up the MCU upon return

Toggle between the red LED in main()

Enter LPM4 in the main() again

01/26/2011

TI Confidential – NDA Restrictions

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Agenda9

Agenda

  • Introduction to Value Line

  • Code Composer Studio

  • CPUX and Basic Clock Module

  • Interrupt and GPIO

  • TimerA and WDT+

  • Low-Power Optimization

  • ADC10 and Comparator_A+

  • Serial Communications

  • Grace

  • Capacitive Touch Solution


What is capacitive touch

What is Capacitive Touch?

C4

C3

C2

C1

  • A change in Capacitance …

  • When a conductive element is present - Finger or stylus

    • Add C3 and C4, resulting in an increase in capacitance C1 + C2 + C3||C4

    • This becomes part of the free space coupling path to earth ground

  • When the dielectric (typically air) is displaced

    • Thick gloves or liquid results in air displacement and change in dielectric

    • Capacitance is directly proportional to dielectric, capacitance (C2) increases (air ~1, everything else > 1)


Msp430 capacitive touch options

MSP430 Capacitive Touch Options

Pin oscillator method

(PinOsc with internal RO)

No external components required

Timer used

Currently MSP430G2xx2 and MSP430G2xx3

< 3uA/Button

RO method

Most robust against interference

Timer used, comparator used

MSP430 devices with comparator

10uA/Button

RC method

Lowest power method

Supports up to 16 keys

GPIO plus timer used

Any MSP430 device

1uA/Button


Library structure

Library Structure

Configuration

APPLICATION LAYER:

Schedule:

Sensor

Peripherals

Period definition

16bit

Capacitance

Offset

Array of deltas

0/1

Z

X

A

SCHEDULER

Sensor Delta

CAP TOUCH LAYER

Button

Slider

Wheel

Proximity

Sensor:

Electrodes

Reference

Sensor Type

Measurement Method

Peripherals

Peripheral settings

Measurement Parameters

Capacitance Sensor

Compensation

Determination of threshold crossing

Filter Method Type:

HAL

Fast Scan RO

PinOsc

RC

RO

Element:

Port I/O definitions

PHYSICAL LAYER:


Capacitive touch boosterpack

Capacitive Touch BoosterPack

Part Number: 430BOOST-SENSE1

  • Capacitive Touch plug-in for LaunchPad

  • Touch button, scroll wheel & proximity sensor

  • Includes MSP430G2xx2 with Cap Touch I/O module

  • Example design for scroll wheels & Proximity sensor

  • Full support for Capacitive Touch Library

  • Only $10

  • www.ti.com/capacitivetouch


Thank you

Thank you!


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