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NS9750 - Training Hardware. USB 2.0. USB Overview. USB Device. Full Speed (12Mbps) or Low Speed (1.5Mbps) One bi-directional control EP (end point) and 11 unidirectional programmable EP’s Supported by a DMA controller Select either Usb Host or Device. USB Device Hardware Configuration.

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NS9750 - Training Hardware

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Ns9750 training hardware

NS9750 - Training Hardware


Usb 2 0

USB 2.0


Usb overview

USB Overview


Usb device

USB Device

  • Full Speed (12Mbps) or Low Speed (1.5Mbps)

  • One bi-directional control EP (end point) and 11 unidirectional programmable EP’s

  • Supported by a DMA controller

  • Select either Usb Host or Device


Usb device hardware configuration

USB Device Hardware Configuration

Negotiate/Configure

DMA Setup/Completion

Handle Transaction Errors


Negotiate configure

Negotiate/Configure

  • Respond to Get Device Configuration Setup Command (see www.usb.org/developers/docs)

  • Device HW Naks until an IN DMA on Channel zero is created

  • After Set Device Configuration Setup Command interrupt occurs, read CFG, INTF, and ALT (0x9010_0004) and program endpoint registers (0x9010_3000 - 0x9010_3150)


Dma setup completion

DMA Setup/Completion

  • Enable DMA In or Out depending on CIA selected by Usb Host

  • Fifo/DMA 0 is OUT on Control port, DMA 1 is IN, remainder correspond to Endpoints 1..11

  • Enable DMA completion and error interrupts for each channel [GLBL_EN, GBL_DMA, FIFO, URST, ERR(0-2), NAK(0-2), UFLOW(0-2), OFLOW(0-2)]

  • Ack interrupt complete by writing ECIP of interrupt status register


Handle transaction errors

Handle Transaction Errors

  • Read ECIP to determine if error occurred.

  • If error on IN DMA (to host):

    • Read in packet counter PKTCNT

    • Increment DMA start pointer by that many packets (start += PKTCNT * MAXPKTSZ), and decrement length by that amount

    • Write buffer REFETCH bit

    • Take the channel/Fifo out of reset (write status.CLR to 0)


Transaction error

Transaction error

  • If OUT DMA Error:

    • NS9750 will close all outstanding DMA buffers on this channel (with error)

    • User should read PKTCNT and setup a new DMA buffer starting at PKTCNT+MAXPKTSZ (since PKTCNT –1 ok transactions)

    • ??Take channel Fifo out of reset ???


Usb host

USB Host

  • Follows OHCI 1.0a programming model

  • See www.usb.org/developers/docs

  • Compatible with Full and low speed devices

  • Provides current relay pin for power management of connected device


Usb host operation

USB Host Operation

Initialize OHCI

Wait for devices to attach

Transfer Descriptor Setup/Complete


Ohci initialization

OHCI Initialization

  • Wait for NS9750 UsbHost to come out of reset

  • Allocate an HCCA structure

  • Create blank TD and ED for Bulk, Isochronous, Interrupt and Control queues

  • Enable OHCI interrupt in NS9750

  • Set FrameInterval and HcPeriodic Start

  • Set up Root Hub (eg GoodToGo, PowerSwitching and OverCurrentProtection)


Ohci setup

OHCI Setup

  • Host Controller Registers start at 0x0900_1000

  • User must set up HCCA and maintain Endpoint descriptors and Transfer Descriptors

  • Only one interrupt: OHCI_IRQ


Wait for device to attach

Wait for device to attach

  • Standard OHCI, wait for port CCS, then reset the attached device, then start GET DEVICE DESCRIPTOR transfer.

  • Application sends above transfer and then sends a SET CONIFGURATION and SET INTERFACE transfer.

  • From the selected CIA, add Endpoint descriptors to appropriate OCHI schedule table


Transfer descriptor setup complete

Transfer Descriptor Setup/Complete

  • Follows standard OCHI model

  • Setup TDs as requested by app.

  • Handle Done queue interrupts to retire TDs and free TD memory.


Hints kinks

Hints & Kinks

  • Can the USB Host and Device work at the same time?

    • No

  • Are Usb 2.0 Devices supported?

    • USB 2.0 Low and Full speed devices are. In addition, USB 1.1 devices are supported.

  • Does the USB Host supply power?

    • Not from the NS9750.


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