PORTLAND QUANTUM LOGIC GROUP

1. PORTLAND QUANTUM LOGIC GROUP

2. Optical Conservative Reversible and Nearly Reversible Gates

3. Integrated optics • Integrated optics offers a particularly interesting candidate for implementing parallel, reversible computing structures • These structures operate in closer correspondence with the underlying microphysical laws which presume non-dissipative interactions and global interconnections.

4. Zero energy can be dissipated internally • Dissipation in such circuits would arise only in reading the output, which amounts for clearing the computer for further use. • Total decoupling of computational and thermal modes. • Decoupling is achieved by: • reversing the computation after the results have been computed, • restoring the circuit to its initial configuration

5. In optical and superconducting devices the decoupling between mechanical interaction modes and thermal modes can be effectively achieved. • For instance, isolation from thermal degrees of freedom occurs for: • 1. conservative-logic inverse, • 2. product functions, • 3. identity function • In optical nonlinear interface it occurs for 1 and 2 • In supercomputing loops used as memory elements it occurs for 3

6. This is described in E. Fredkin and T. Toffoli, “Conservative Logic”, Int. J.Theor. Phys. 21,219 (1982).

7. Troubles with optical logic • When the gate can be implemented, the output power from the gate is so low that cascading of gates is not possible. • J. Shamir, H.J. Caulfield, W.J. Micelli, and R. J. Seymour, “Optical Computing and the Fredkin Gates” Appl. Optics. 25,1604 (1986) • K.M. Johnson, M.A. Handschy and L.A. Pagano-Stauffer, “Optical Computing and Image Processing with Ferro-Electric Liquid Crystals”, Opt. Engr. 26, 385 (1987). • R. Cuykendall and D. Millin, “Limitations to Optical Fredkin Circuits”, OSA Tech Digest Ser.11, 70 (1987).

8. Requirements for gates • No distinction can be made between the inputs. • Each must be of the same type (in this case optical) and at the same level • The unrestricted type of gate permits a significant reduction in circuit’s complexity. • The circuit must be both optically reversible and information-theory (logic) reversible.

9. The device • An optical four-state nonlinear interface switching configuration is derived from the symmetry of an information-losless three-port structure • The device is: • bit-conservative • optically reversible • logically reversible • with dissipation related to the Kramers-Kronig inverse of the index of refraction

10. The device • The device inherently possesses three-terminal characteristics: • insensitivity to line-noise fluctuations (maintains high contrast between transmitted and reflected beams) • cascadability through bit conservation, • fan-out by pumped transparentization, • free-space optical fan-in, • pumped (total internal) reflected inversion.

11. A diffusive Kerrlike nonlinearity relating the intensity of the beam to the nonlinear mechanism density through the diffusion equation produces results which differ fundamentally from previous nondiffusive calculations. • Planar lattice-regularized layouts for binary adders • They reflect minimal reversible circuit designs.

12. The dual-beam nonlinear interface • n 1 = n 10 • n 2 = n 10 -  n L + n 2NL(I0) • 90o inc sin-1 (n10-  n L + n 2NL(I0) )/ n10

13. Fig. 2 Nonlinear interface with polarized signal beams of intensity I0 incident at glancing angle  0 or I0 0 or I0  n 2 = n 10 -  n L + n 2NL(I) n 1 = n 10 I0 or 0 2I0 or 0

14. Fig. 3. Signal replication circuits consisting of an RNI and a half-wave plate. • Note that: • P or Qis the degraded signal • P and Q is the restored signal RNI = reversible non-linear interface Pv.Qh PQ’v.P’Qh PQv.PQh

15. 1 h P v 1 v Q h Pv Qv Ph Qh Pv.Qh PQ’v.P’Qh RNI Fig. 3. Signal replication circuits consisting of an RNI and a half-wave plate. Half-wave plate • Note that: • P or Qis the degraded signal • P and Q is the restored signal /2 Pv Ph PQv.PQh Qv Qh

16. Interaction gate implemented with a Fabry-Perot cavity Q P n = n0 + n 2NL(I) PQ PQ’ PQ P’Q

17. AB AB A A’B A’B AB’ AB’ B AB AB Interaction Gate Inverse interaction Gate Interaction Gate A B In this gate the input signals are routed to one of two output ports depending on the values of A and B

18. Priese Switch Gate Inverse Priese Switch Priese Switch CP CP P P C C C’P C’P C C In this gate the input signal P is routed to one of two output ports depending on the value of control signal C

19. C C P C’P+CQ Q CP+C’Q Fredkin Gate Inverse Fredkin Gate Fredkin Gate C C P C’P+CQ Q CP+C’Q In this gate the input signals P and Q are routed to the same or exchanged output ports depending on the value of control signal C

20. Q P C Fredkin Gate from Priese Switch Gates CQ  CP+CQ  CQ CP+  CQ CP C  CP

21. Operation of a circuit from Priese Switches One red on inputs and outputs Conservative property CQ  CP+CQ Q=0  CQ CP+  CQ CP P=1 C=1 C  CP Two red on inputs and outputs Red signals are value 1

22. Fredkin Gate from Interaction Gates C P Q C CP+  CQ  CP+ CQ

23. Minimal Full Adder using Interaction Gates AB A A’B B AB’ AB Carry 0 A  B AB Sum A’B C AB’ AB

24. Minimal Full Adder Using Priese Switch Gates AB A carry B B A’B sum C

25. Minimal Full Adder Using Fredkin Gates A carry B C 1 sum 0 In this gate the input signals P and Q are routed to the same or exchanged output ports depending on the value of control signal C

26. h v v h v h v h v,h v,h RNI Half-Adder Vertical polarization mirror horizontal polarization mirror

27. ABv Ah A’Bv AB’h Bv Ah Bv ABh A’Bv + AB’h ABv + ABh Problem: Create such a circuit for the lattice of symmetric functions – not for exam.

28. v v v h h 1h RNI Half-Adder Ah Bv A’Bv A’Bv 1h A’Bv A’Bh A’Bv + AB’h AB’h ABv AB’h Bv(A’B+A’B)h ABv + ABh ABv Problem: Create such a circuit for the lattice of symmetric functions – not for exam. Removes v Sum = (A’B+A’B)h Carry = ABh