Complex Upset Mitigation Applied to a Re-Configurable Embedded Processor. EEL 6935 Lu Hao Wenqian Wu. Outline. Issues of SRAM-based FPGA used for space application Upset mitigation solutions Resource usage and performance analysis Summary. System on Programmable Chip.
Download Policy: Content on the Website is provided to you AS IS for your information and personal use and may not be sold / licensed / shared on other websites without getting consent from its author.While downloading, if for some reason you are not able to download a presentation, the publisher may have deleted the file from their server.
Onchip peripheral bus
Local memory bus
In space, high energy ionizing particles exist as part of the natural background.
In addition, solar particle events and high energy protons trapped in the Earth's magnetosphere (Van Allen radiation belts).
These electro-magnetic radiation brings potential threats to electronic devices.
SEU is a change of state caused by ions or electro-magnetic radiation striking a sensitive node in a micro-electronic device, such as in a microprocessor, semiconductor memory, or power transistors. The state change is a result of the free charge created by ionization in or close to an important node of a logic element (e.g. memory "bit").
data/instruction stored in block memory
configuration bits stored in distributed RAM
Xilinx TMR: easily trade off maximum radiation effect immunity against area, pinout, and board layout consideration.
Xilinx Virtex II XQR2 V6000 FPGA
Crocker Nuclear Laboratory at University of California at Davis using a proton beam of 63.3 MeV.
Two FPGAs, one is device under test (DUT), the other is service FPGA
1) configuration readback and scrubbing DUT when there is readback error
2) control and monitoring of the functional operation of the MicroBlaze running the FFT program
3 modules performing the same task, only the majority will be pick up as output by the Voter.
If any one of the three systems fails, the other two systems can correct and mask the fault. If the voter fails then the complete system will fail. However, in a good TMR system the voter is a critical component and should be much more reliable than the other components.
normal device operation runs concurrently and without interruption
Port A: used for MicroBlaze processor
Port B: counter connected; used for error detection and correction
This is what we emphasis on
(No BRAM scrubber) Embedded Processor
Is BRAM code corruption the main reason of runaway resets?
Thanks! Embedded Processor