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Powering tests

Powering tests. Laura Gonella Physikalisches Institut Uni Bonn. Regulator powering configuration 1. Regulator powering configuration 1. 0.01 Ω. 0.01 Ω. Power up - Voltage. Vin is the voltage at the power supply Vin Reg1, Vin Reg2, VDDD, VDDA are measured at the pad

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Powering tests

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  1. Powering tests Laura Gonella Physikalisches Institut Uni Bonn

  2. Regulator powering configuration 1 L. Gonella - Powering tests

  3. Regulator powering configuration 1 0.01Ω 0.01Ω L. Gonella - Powering tests

  4. Power up - Voltage • Vin is the voltage at the power supply • Vin Reg1, Vin Reg2, VDDD, VDDA are measured at the pad • Wire bond from the pad to a measurement point L. Gonella - Powering tests

  5. Power up - Current • Iin is the current measured at the power supply, i.e. total current flowing to the chip • Ia and Id are the analog and digital currents measured across the 10mΩ resistor • The current flowing thorugh the regulators at start up is defined by Vin/Rext, not by the load • This is always the case as long as Iload < Vin/Rext VDDD regulated VDDA regulated L. Gonella - Powering tests

  6. Voltages and currents • (*) Vref1 = 0.730V, increased to 0.750V after loading the std cfg L. Gonella - Powering tests

  7. Threshold scan L. Gonella - Powering tests

  8. Threshold scan – PrmpVbp*2 L. Gonella - Powering tests

  9. Regulator powering configuration 2 L. Gonella - Powering tests

  10. Regulator powering configuration 2 Vref = 0.740V 0.01Ω Vref = 0.740V 0.01Ω L. Gonella - Powering tests

  11. Power up - Voltage • VDDD and the Vin for the regulators are ramped up in steps of 100mV to avoid switching on the protection diodes L. Gonella - Powering tests

  12. Power up - Current L. Gonella - Powering tests

  13. Threshold scan L. Gonella - Powering tests

  14. Threshold scan – PrmpVbp*2 L. Gonella - Powering tests

  15. Vref mismatch • The short between the outputs is not exactly a short. There is a resistance of 2.1Ω between the output of the regulators • This introduces an unbalance between the current distribution on top of what is given by mismatch in the design, Vref values, Rext values, etc.. 0Ω VDDA 2.1 Ω L. Gonella - Powering tests

  16. Vref mismatch L. Gonella - Powering tests

  17. Summary table L. Gonella - Powering tests

  18. Backup L. Gonella - Powering tests

  19. Direct powering configuration 1 L. Gonella - Powering tests

  20. Direct powering configuration 1 1.5V 1.2V L. Gonella - Powering tests

  21. Voltages and currents • I is measured at the power supply • Resistance of the analog input path = Ra = 0.157Ohm • Resistance of the digital input path = Rd = 0.265Ohm L. Gonella - Powering tests

  22. Threshold scan L. Gonella - Powering tests

  23. Threshold scan – PrmpVbp*2 L. Gonella - Powering tests

  24. Direct powering configuration 2 L. Gonella - Powering tests

  25. Direct powering configuration 2 • VDDD and VDDA shorted at supply • Same wires as in the previous measurement • Use calculated Ra and Rd to extimate analog and digital current, Ia and Id 1.5V L. Gonella - Powering tests

  26. Voltages and currents • I is the current measured at the power supply, Ia and Id are calculated using Ra and Rd L. Gonella - Powering tests

  27. Threshold scan L. Gonella - Powering tests

  28. Threshold scan – PrmpVbp*2 L. Gonella - Powering tests

  29. Powering configurations Regulator powering configuration 1 Direct powering configuration 1 Regulator powering configuration 2 Direct powering configuration 2 L. Gonella - Powering tests

  30. Meaurements • For different powering configuration, measure PrmpVbp = PrmpVbp_L/R = 86 For now done on bare chips. Current PCB does not have circuitry for sensor HV. 43 VDDA2M is not connected on the PCB. It was removed to make space for regulator testing circuitry. Wire bond from VDDA pad to measurement point. Same for VDDD. L. Gonella - Powering tests

  31. Setup • Power is provided via an independent power supply • Either to VDDD and VDDA directly or to the input of the regulators • USBpix is used only to send/receive signals to/from the chip • Stcontrol • Standard configuration file • Top row not powered • DC1 and DC40 disabled L. Gonella - Powering tests

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