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Requirements for CMS phase 2 Pixel detector

Requirements for CMS phase 2 Pixel detector. L.Demaria – INFN Torino. Premessa. CMS has just published a TDR for the Phase 1 pixel upgrade. There you find an Appendix on the “Evolution of Pixel detector” that is looking towards a new pixel detector for the HL_LHC period

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Requirements for CMS phase 2 Pixel detector

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  1. Requirements for CMS phase 2 Pixel detector L.Demaria – INFN Torino L.Demaria - CMS requirements for Pixel Ph2

  2. Premessa • CMS has just published a TDR for the Phase 1 pixel upgrade. There you find an Appendix on the “Evolution of Pixel detector” that is looking towards a new pixel detector for the HL_LHC period • This document comes from the work of few CMS groups interested to this development already by some time. The main object of study are a new chip and the sensor R&D. • You will find here a (good) part of that work. L.Demaria - CMS requirements for Pixel Ph2

  3. Motivations Main goals of Phase 2 pixel detector • Maintain or improve basic detector performance • Resolution, >99% hit efficiency • Robust tracking • Track efficiency despite high P.U., Vertexing, b-tagging,… • Survive to Phase 2 hostile condition • Radiation hardness • High particle flux • Contribute to Trigger • L1, HLT All this implies the development of a new ReadOut Chip (ROC) L.Demaria - CMS requirements for Pixel Ph2

  4. Conditions from LHC Final goal is to reach 3000 fb-1 in a decade, therefore 250-300 per year • L = 5-7 1034cm-2s-1 constant using levelling • Levelling imposed by Experiment due to pile-up, but machine CAN will be capable to go to 1035cm-2s-1 . • pile-up: 100 for 25ns BX; 200 for 50ns –still open • Important to see LHC operation after LS1 (25 or 50ns), i.e. 2015-2016 L.Demaria - CMS requirements for Pixel Ph2

  5. Geometry of Pixel Ph2: CMS Pixel Phase 1 Let’s start with a good and solid example = CMS PIXEL Phase 1 Upgrade geometry: clearly the most demanding layer defines most stringent technical specs for the chip  L1 with Rmin=29.5 mm L.Demaria - CMS requirements for Pixel Ph2

  6. Critical from HL_LHC • Particle fluence for 3000 fb-1 • up to ~ 15 1015 p/cm2 • below 5 1015 p/cm2 for outer layers • Track flux • Up to 500 MHz/cm2 • to be compared to 200 MHz/cm2 of Phase 1 Same pixel chip for all layers is the baseline L.Demaria - CMS requirements for Pixel Ph2

  7. Sensors • Candidate to be chosenamong the usual suspects: • Thin planar • 3D pixel • Diamonds • In all cases signal will be low: low threshold (in-time) is needed • Leakage current very different from silicon and diamonds • Capacity very different from planar/diamond and 3d • Sensor thickness can be very different (100 to more than 300 mm) • thin Planar (100 mm) silicon might work up to 5-7 1015 if low threshold achieved (see next slide) L.Demaria - CMS requirements for Pixel Ph2

  8. Planar Silicon – model studies PRELIMINARY Studies More will be know From irradiation tests Up to 7.2 1015cm-2 Geometry (30x100) cell with 100µm thickness with a1000e threshold. Global-z resolution remains “well-behaved” and gradually worsens to about a 50% resolution loss at the largest fluence. The thin planar detector concept is quite attractive if the threshold of the readout chip is significantly reduced. Studies from Swartz Morris L.Demaria - CMS requirements for Pixel Ph2

  9. Performance • Resolution: charge sharing limited with radiation damage. To mantain good resolution it is essential to reduce the Rphi size • Low occupancy: in presence of very high pile-ups can be preserved only with a higher granularity. • Cluster merging: has to be reduce to a minimum, particularly for high pt physics  tracks should maintain high efficiency. This again goes to the direction of general reduction of pixel area • Vertex identification along Z more demanding at these very high PU. Status of art for next future : CMS Ph1 (100x150), ATLAS IBL (50x250) um2 For HL_LHC we set upper limits: not bigger than (50x100) um2 L.Demaria - CMS requirements for Pixel Ph2

  10. Track Flux • Track flux (TRK-flux) for L1 of CMS pixel at 5 1034cm-2s-1 is about 500 MHZ/cm2 • What counts also is the pixel flux, Pix-Flux = TRK-flux * cluster-size. This depends on the sensor used and also its position In the barrel region, from a simple model one can see the influence of the track projection in the z-direction (long cluster). For same segmentation in z, thicker detectors imply higher pixel rate (in barrel). Clearly thinner sensors allow higher segmentation in z Cluster size  L.Demaria - CMS requirements for Pixel Ph2

  11. Trigger Contribution of Pixel to TRIGGER increasing interest from community and few initial case studies have been identified. • L1 Implementation requires more pixel intelligence on FE: • Region of Interest readout with coarse information under receive of a L0 • L0 rate ~1 MHz for 10% of chip. • Self-triggering • Few MHz, very demanding for Inner Layers • COST in POWER budget and ASIC complexity • More intelligence into back-end (~no cost for FE) • Possible request on FE: early clustering info Increase of Latency CMS considering to increase substantially the Latency • An increase of a factor ~5 (coming from Track-Trigger) COST in term of local buffering Increase of L1 rate: see next slide L.Demaria - CMS requirements for Pixel Ph2

  12. Data rate • Plan to increase substancially the L1-rate = readout will be more demanding • Minimal 200 KHz • Considering higher values (up to 1 MHz) • For 100-200 KHz seems conceivable to have 1 LP-GBT per module, but for 1 MHz clearly this imposes more LP-GBT per modules and required data link chip/LP-GBT • Clearly chip power consumption will be higher • In case of very high L1 it makes sense to implement more trigger functionalities in HLT L.Demaria - CMS requirements for Pixel Ph2

  13. Power Several contributions to the overall budget. Extrapolation from present chip is not trivial to do. Few important factors that tend to increase power: • higher pixel fluxes (impact on digital power) : imposed by physics (HL_LHC) • higher readout rates: imposed by experiments • New trigger functionalities • higher intelligence • higher granularity (more pixels = more power) Looking to LHC experiments pixel chip show values of 200-500 mW/cm2or 30-50 mW per pixel. These values will certainly tend to higher for a higher flux at HL_LHC and can be partially compensated by new technology. In CMS we indicated as upper limit a value of 1 W/cm2 . This means: • <50 mW per pixel (50x100 ) um2 • <25 mW per pixel (25x100 or 50x50) um2 L.Demaria - CMS requirements for Pixel Ph2

  14. Initial compilation of Technical Specs > L.Demaria - CMS requirements for Pixel Ph2

  15. CMS groups interested Started collaboration among INFN, FNAL and CERN for the development of a new (generation) pixel chip for future upgrades. We had a couple of small brain-storming/workshops in Torino and we started to organize the work: • Analogue : INFN-Torino, FNAL • See presentation from Angelo • Digital & Architect: CERN & INFN-Perugia • See presentation of Jorgen Other institute interested: • Pisa (digital), Padova (radiation hardness) …growing collaboration L.Demaria - CMS requirements for Pixel Ph2

  16. Conclusion • First studies on a new chip for HL_LHC started since some time • INFN, FNAL and CERN started to do real work and collaborating, defining initial share of work • 65nm technology is brand new in HEP applications and we all need to exploit the new potentiality on a new generation pixel chip • Clearly this is just the beginning, we all look to find synergies, collaboration inside HEP and share experience on this technology L.Demaria - CMS requirements for Pixel Ph2

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