1 / 6

FPGAs and IRRADIATED FPGAs for the LHCb UPGRADE (update)

FPGAs and IRRADIATED FPGAs for the LHCb UPGRADE (update). Bin Gui, Ray Mountain. LVDS LOOP. LVDS LOOP. Test Project #3.0. Clock. Counter. 1 bit. 1 bit. 1 bit. 8 bit. Shiftregister. LVDS LOOP. Shiftregister. LED. Reset. Enable, Aclr. Problem.

abby
Download Presentation

FPGAs and IRRADIATED FPGAs for the LHCb UPGRADE (update)

An Image/Link below is provided (as is) to download presentation Download Policy: Content on the Website is provided to you AS IS for your information and personal use and may not be sold / licensed / shared on other websites without getting consent from its author. Content is provided to you AS IS for your information and personal use only. Download presentation by click this link. While downloading, if for some reason you are not able to download a presentation, the publisher may have deleted the file from their server. During download, if you can't get a presentation, the file might be deleted by the publisher.

E N D

Presentation Transcript

  1. FPGAs and IRRADIATED FPGAs for the LHCb UPGRADE(update) Bin Gui, Ray Mountain

  2. LVDS LOOP LVDS LOOP

  3. Test Project #3.0 Clock Counter 1 bit 1 bit 1 bit 8 bit Shiftregister LVDS LOOP Shiftregister LED Reset Enable, Aclr

  4. Problem • To solve the problem of pin assignment, we have to delete a quadrant of the FPGA. • But we need to use the whole FPGA for test, so we modified the project to make sure that we can use the external clock through LVDS port.

  5. Test Project #3.1 Clock 1 bit 1 bit 1 bit 6 bit Counter LVDS LOOP Shiftregister Shiftregister LED 1 bit Enable, Aclr LED Reset

  6. Next step • Studying and writing programming file into FlashROM. • Establishing the communication between computer and the FPGA through LVDS ports

More Related